Senior ASIC Verification Engineer - RTL, UVM, AI-Driven

Upscale AI; United States; Hybrid; USD 212,000 - 246,000; Full time

Job summary

Upscale AI in the United States is seeking a senior ASIC verification engineer with 10+ years of industry experience (or a master’s with 7+ years) to design, verify, and maintain block- and system-level verification environments and testbenches for high-performance AI ASICs.

You will drive verification planning, coverage, ABV, and formal methods, collaborating with design teams to accelerate development cycles and improve quality.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 10+ years of industry experience.
• Or a Master's degree with 7+ years of relevant experience.
• Proven experience verifying complex ASIC designs at block and system levels.

Responsibilities

• Design, develop, and maintain verification environments, testbenches, and reference models for block- and system-level designs.
• Develop verification plans and test cases to ensure complete functional coverage.
• Verify RTL designs using directed testing, constrained-random verification, ABV, formal verification, and functional coverage.
• Perform RTL code coverage analysis, assertion coverage, functional coverage, and gate-level simulations.
• Debug and resolve design and verification issues with cross-functional teams.
• Drive adoption of advanced verification methodologies and automation frameworks.
• Apply data-driven analytics and AI-assisted techniques to improve test generation, regression analysis, and coverage.

Skills

SystemVerilog

UVM

ASIC verification

C/C++/Python

Debugging

Regression management

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science

Master's degree in related field (optional)

Job description

Why join Upscale, Inc.

Upscale, Inc., is building the high-performance infrastructure powering the next generation of artificial intelligence. Backed by over $300M in funding and rapid global adoption, we are scaling systems designed for the world’s most demanding AI workloads.

We focus on first-principles engineering across silicon, systems, and networking—where performance, scale, and execution are critical.Our team is talent-dense andhigh-performing. We value ownership, technical rigor, and speed, and we offer the opportunity to work on foundational problems with immediate, real-world impact.

If you’re looking to do high-impact work, move fast, and help define the infrastructure behind the future of AI—Upscale is where you can produce meaningful work at the frontier—and operate at a high standard.

Job Responsibilities

• Design, develop, and maintain robust verification environments, testbenches, reusable verification components, and reference models for block- and system-level designs.
• Develop comprehensive verification plans and create test cases to ensure complete functional coverage.
• Verify RTL designs at both block and chip levels using directed testing, constrained-random verification, assertion-based verification (ABV), formal verification techniques, and functional coverage methodologies.
• Perform RTL code coverage analysis, assertion coverage, functional coverage, and gate-level simulations to validate design quality and completeness.
• Debug and resolve design and verification issues by collaborating closely with design, architecture, and cross-functional engineering teams.
• Drive the adoption of advanced verification methodologies, automation frameworks, and best practices to improve verification quality and efficiency.
• Apply data-driven analytics and AI-assisted techniques to improve test generation, regression analysis, coverage optimization, and debug productivity.
• Continuously improve verification processes, infrastructure, and reusable verification IP to accelerate development cycles and enhance design quality and reliability.

Job Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 10+ years of industry experience, or a Master's degree with 7+ years of relevant experience.
• Proven experience verifying complex ASIC designs at both block and system levels.
• Strong proficiency with SystemVerilog and the Universal Verification Methodology (UVM).
• Extensive knowledge of ASIC design verification methodologies, verification flows, and industry best practices.
• Experience collaborating with cross-functional teams to deliver ASIC products from architecture through first customer shipment (FCS).
• Strong programming and scripting skills in C, C++, and/or Python.
• Excellent debugging and root-cause analysis skills with the ability to independently resolve complex design and verification issues.
• Experience with verification planning, functional coverage, assertion-based verification (ABV), constrained-random verification, and regression management.
• Domain knowledge of Ethernet, PCIe, and switch fabric architectures is highly desirable.
• Familiarity with data analytics, AI/ML-assisted verification techniques, or automation tools to improve test generation, regression analysis, coverage closure, and debug productivity is a plus.
• Strong analytical, problem-solving, and communication skills with a passion for solving complex technical challenges.
• Self-motivated, detail-oriented, and able to work effectively both independently and as part of a collaborative engineering team.

$212,000 - $246,000 a year

Where you fall within that range depends on your experience, skills, and impact—we benchmark against internal levels to keep things fair and consistent.

Equal Opportunity

Upscale, Inc., is building a team that reflects a wide range of perspectives, backgrounds, and experiences. We’re proud to be an Equal Opportunity Employer and consider all qualified applicants regardless of race, color, religion, national origin, sex, sexual orientation, gender identity, disability, or veteran status.

Accessibility & Accommodations

We’re committed to making our hiring process accessible to everyone. If you need accommodations at any stage, just reach out to us [e-mail]—we’re happy to help. Note: This inbox is only for accommodation requests.