Senior ASIC Verification Engineer for AI Data Center

Cisco Systems, Inc.; San Jose (CA); On-site; USD 168,000 - 245,000; Full time

Benefits offered by this job

Medical insurance

Dental & Vision

401(k) with Cisco matching

Paid parental leave

Disability coverage

Life insurance

Holidays & vacation

Volunteer time off

Job summary

Cisco Systems, Inc. in California is seeking an ASIC Design Verification Engineer to join the Common Hardware Group. You will develop and maintain verification environments, run end-to-end tests, and collaborate with designers and software teams to verify blocks, clusters and full chip.

The role requires SystemVerilog and UVM, ASIC verification experience, and strong debugging skills to support Cisco’s data center and AI networking solutions at scale.

Qualifications

• Bachelor’s degree in Electrical or Computer engineering with 7+ years ASIC experience, or Master’s with 4+ years, or PhD with 1 year ASIC experience.
• Proficiency in SystemVerilog and UVM.
• Experience with ASIC design and verification processes, debugging, methodology, and tools.
• Experience in verifying blocks/clusters/full chip level for ASIC.

Responsibilities

• Architect, develop, and maintain block, cluster, and top-level Design Verification environment infrastructure; Perform end-to-end verification of design blocks and top-level
• Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, post silicon bring up and performance analysis.
• Ensure comprehensive verification coverage through code and functional coverage implementation and review
• Collaborate with designers, architects, software teams, and vendors
• Lead multiple tasks efficiently with clear written and verbal communication
• Cultivate partnership and promote collaboration among team members

Skills

SystemVerilog

UVM

ASIC verification

C/C++

Python

Linux

Education

Bachelor’s degree in Electrical or Computer engineering

Master’s degree in Electrical or Computer engineering

PhD in Electrical or Computer engineering

Job description

Cisco Systems, Inc. in California is seeking an ASIC Design Verification Engineer to join the Common Hardware Group. You will develop and maintain verification environments, run end-to-end tests, and collaborate with designers and software teams to verify blocks, clusters and full chip.

The role requires SystemVerilog and UVM, ASIC verification experience, and strong debugging skills to support Cisco’s data center and AI networking solutions at scale.