Staff ASIC Verification Engineer for AI/Data Center

Meta; Sunnyvale (CA); On-site; USD 178,000 - 250,000; Full time

Job summary

Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon powering Meta's data center infrastructure. You will architect end-to-end verification environments and drive coverage closure across IP blocks and SoCs for AI/ML acceleration, networking, and storage workloads.

You will collaborate with design, emulation, and post-silicon validation teams to ensure first-pass silicon success and continuous

Qualifications

• 8+ years of hands-on SystemVerilog/UVM verification experience.
• 8+ years of IP/sub-system and/or SoC level verification using SystemVerilog UVM/OVM methodologies.
• Experience in SV assertions, formal, and emulation.
• Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.
• Experience in architecting and implementing design verification infrastructure and executing the full verification cycle.
• Familiarity with power management verification concepts.

Responsibilities

• Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
• Develop functional tests based on the verification test plan
• Drive design verification to closure based on defined verification metrics on the test plan, functional, and code coverage
• Debug, root-cause and resolve functional failures in the design, partnering with the design team
• Collaborate with cross-functional teams like Design, Model, Emulation, and silicon validation teams towards ensuring the highest design quality
• Develop and drive continuous design verification improvements using the latest verification methodologies, tools, and technologies from the industry

Skills

SystemVerilog/UVM

C/C++ verification

IP/sub-system/SoC verification

Power management verification concepts

SV assertions/formal/emulation

Python scripting

Education

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

Bachelor's degree in Computer Science, Computer Engineering, a relevant technical field, or equivalent practical experience

Tools

EDA tools

Python

TCL

Perl

Shell

Job description

Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon powering Meta's data center infrastructure. You will architect end-to-end verification environments and drive coverage closure across IP blocks and SoCs for AI/ML acceleration, networking, and storage workloads.

You will collaborate with design, emulation, and post-silicon validation teams to ensure first-pass silicon success and continuous