Senior ASIC Validation & Bring‑Up Engineer

Cisco; San Jose (CA); On-site; USD 168,000 - 245,000; Full time

Job summary

Cisco is seeking a Senior ASIC Validation Engineer to join the Silicon One team. You will drive post-silicon validation, bring-up, and debugging across ASICs, coordinating with RTL, firmware, and test teams to ensure robust silicon readiness.

Requires strong C, Python scripting, and lab instrumentation experience. You will work on pre- and post-silicon activities, with opportunities to influence firmware workarounds and architecture decisions.

Qualifications

• Bachelor's in Electrical or Computer Engineering; 7+ years' experience, or advanced degrees with reduced experience.
• Experience in post-silicon validation, bring-up, and debug with ASICs.
• Experience in early silicon bring-up, debug, and validation.
• Experience bringing up standard peripheral interfaces (I2C, SPI, JTAG) and protocols (PCIe, Ethernet).
• Fluency in C, Python, and scripting for validation automation.

Responsibilities

• Plan and execute Silicon Bring-up infrastructure including system boot and power-on.
• Collaborate with design, verification, and board teams to root-cause issues.
• Prepare validation test plans and run functional/performance tests at IP/subsystem/full-chip level.
• Extend post-silicon validation infrastructure, automation, and regression suites.
• Apply lab instrumentation expertise as part of validation and characterization.
• Coordinate with RTL/DFT/ATE/firmware teams for smooth pre to post-silicon transitions.
• Provide feedback on test escapes, yield issues, and silicon errata for revisions.

Skills

Post-silicon validation

ASIC bring-up

PCIe

Ethernet

Firmware debugging

C programming

Python scripting

Debugging in low-level silicon

Education

B.S. Electrical or Computer Engineering

M.S. in relevant field

PhD with experience

Tools

SystemVerilog

UVM

Emulation

Oscilloscopes/Lab instruments

Job description

Cisco is seeking a Senior ASIC Validation Engineer to join the Silicon One team. You will drive post-silicon validation, bring-up, and debugging across ASICs, coordinating with RTL, firmware, and test teams to ensure robust silicon readiness.

Requires strong C, Python scripting, and lab instrumentation experience. You will work on pre- and post-silicon activities, with opportunities to influence firmware workarounds and architecture decisions.