Senior ASIC Technical Lead - Mixed-Signal Silicon Delivery

BioTalent; San Diego (CA); Presencial; USD 180.000 - 240.000; Jornada completa

Descripción de la vacante

BioTalent is seeking an experienced ASIC Technical Lead to act as the technical authority for a complex mixed-signal ASIC development program. You will own the technical delivery of the chip, drive engineering accountability, and oversee reviews from architecture through silicon qualification.

The role requires leading complete ASIC lifecycles, reviewing SPICE/Cadence simulations, and collaborating with external partners to ensure tapeout readiness and robust design verification.

Formación

• Bachelor’s or Master’s degree in Electrical Engineering or a related field.
• 5+ years of ASIC or SoC development experience.
• Experience leading at least one complete ASIC lifecycle from concept through silicon delivery.
• Strong background in analog or mixed-signal IC design, validation, or verification.
• Expertise reviewing SPICE/Cadence simulations, DRC/LVS outputs, and DFT methodologies.
• Experience collaborating with external design, fabrication, or foundry partners.

Responsabilidades

• Own and maintain traceable ASIC requirements and technical specifications.
• Lead architecture, design, and pre-tapeout reviews with engineering partners.
• Evaluate simulation results, DRC/LVS reports, and design verification plans to ensure tapeout readiness.
• Manage design risks related to performance, power, noise, and process variation.
• Lead first-silicon bring-up activities and root-cause analysis of technical issues.
• Drive ASIC respin activities and re-verification efforts when necessary.
• Own product sustaining engineering efforts, engineering changes, and future ASIC roadmap planning.

Conocimientos

ASIC/SoC dev

Lifecycle leadership

Analog/Mix-sig design

SPICE reviews

DRC/LVS reviews

External partners

Educación

Electrical Engineering (BSc/MSc)

Herramientas

SPICE

Cadence

DFT methods

DRC/LVS outputs

Descripción del empleo

BioTalent is seeking an experienced ASIC Technical Lead to act as the technical authority for a complex mixed-signal ASIC development program. You will own the technical delivery of the chip, drive engineering accountability, and oversee reviews from architecture through silicon qualification.

The role requires leading complete ASIC lifecycles, reviewing SPICE/Cadence simulations, and collaborating with external partners to ensure tapeout readiness and robust design verification.