Senior ASIC Power Engineer: EDA Flows & Optimization

Meta; Sunnyvale (CA); On-site; USD 180,000 - 250,000; Full time

Job summary

Meta is seeking an ASIC Engineer specializing in power to join the EDA Infrastructure team in Sunnyvale. You will develop and maintain power analysis and optimization flows to help silicon engineers model, estimate, and reduce power consumption in custom ASIC designs.

You will define power methodology, collaborate with RTL and physical design teams, and drive power closure across multiple tape-outs while evaluating new EDA tools and automating workflows.

Responsibilities

• Develop and maintain power analysis and optimization flows to help silicon engineers model, estimate, and reduce power consumption in custom ASIC designs.
• Define power methodology, collaborate with RTL and physical design teams, and drive power closure across multiple tape-outs while evaluating new EDA tools and automating workflows.

Job description

Meta is seeking an ASIC Engineer specializing in power to join the EDA Infrastructure team in Sunnyvale. You will develop and maintain power analysis and optimization flows to help silicon engineers model, estimate, and reduce power consumption in custom ASIC designs.

You will define power methodology, collaborate with RTL and physical design teams, and drive power closure across multiple tape-outs while evaluating new EDA tools and automating workflows.