Senior ASIC/FPGA Verification Engineer – Onsite

RTX; Fort Wayne (IN); On-site; USD 87,000 - 165,000; Full time

Benefits offered by this job

Medical, dental, vision insurance

Three weeks of vacation

401(k) plan with matching

Job summary

Collins Aerospace, part of RTX, seeks a Senior ASIC/FPGA Verification Engineer to join the ART Microelectronics Technology team onsite in Fort Wayne, IN. You will develop verification environments, write test plans, and mentor junior engineers.

Requirements include a STEM degree with 5+ years, DoD Secret clearance, RTL verification with VHDL/Verilog, SystemVerilog, and experience with QuestaSim/Vivado. We offer relocation support and comprehensive benefits.

Qualifications

• Typically requires a STEM degree with 5+ years of related experience, or an advanced degree with 3+ years.
• Active and transferable DoD security clearance is required before start date.
• U.S. citizenship is required as only U.S. citizens are eligible for a security clearance.
• Experience designing, simulating RTL designs using VHDL/Verilog in FPGA/ASIC environments.
• Proven ability to design, implement, and execute verification testbenches for RTL blocks with VHDL/SystemVerilog.

Responsibilities

• Verify architecture and design using SystemVerilog with OVM/UVM.
• Create written test plans, test cases, and coverage tracking.
• Develop testbenches for RTL blocks using VHDL or SystemVerilog.
• Collaborate with design engineers on ASIC/FPGA solutions integration.
• Provide mentoring and technical leadership for verification teams.

Skills

SystemVerilog/UVM

OVM/UVM

RTL verification

VHDL

Verilog

Testbenches

Git/Subversion

DDR/PCIe/Ethernet

QuestaSim

Vivado

Synplify

Quartus

Education

STEM degree

Advanced degree in related field

Tools

QuestaSim

Synplify

Quartus

Vivado

Job description

Collins Aerospace, part of RTX, seeks a Senior ASIC/FPGA Verification Engineer to join the ART Microelectronics Technology team onsite in Fort Wayne, IN. You will develop verification environments, write test plans, and mentor junior engineers.

Requirements include a STEM degree with 5+ years, DoD Secret clearance, RTL verification with VHDL/Verilog, SystemVerilog, and experience with QuestaSim/Vivado. We offer relocation support and comprehensive benefits.