Senior ASIC FC-BGA & MCM Package Architect

K2 Space Corporation

Seattle (WA)

On-site

USD 180,000 - 260,000

Full time

14 days+
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Benefits offered by this job

Equity
Medical coverage
Paid time off
Parental leave

Job summary

K2 Space in Seattle is seeking a Senior ASIC Package Design Engineer to implement advanced FC-BGA/MCM package architecture for high-performance SoCs. You will drive end-to-end package strategy from architecture to production ramp, collaborating with silicon, RF, and systems teams to optimize die floorplans and interfaces.

The role demands 5+ years in ASIC packaging, deep FC-BGA expertise, and hands-on experience with OSATs, substrate vendors, and SI/PI/thermal design.

Qualifications

  • Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related field.
  • 5+ years of experience in ASIC package design, with deep expertise in FC-BGA.
  • Proven experience delivering high-pin-count, high-performance ASIC packages into production.
  • Strong understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs.
  • Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS.
  • Experience working directly with OSATs and substrate vendors.
  • Knowledge of packaging qualification and test methodologies.

Responsibilities

  • Define ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints.
  • Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability.
  • Establish package design standards, methodologies, and best practices.
  • Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content.
  • Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning.
  • Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces.
  • Support package-level SI/PI strategy, including high-speed digital interfaces, power delivery network (PDN) design, and decoupling strategy
  • Lead thermal architecture at the package level, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling.
  • Manage relationships with external packaging vendors, substrate suppliers, and OSATs.
  • Drive material selection, substrate technology choices, and assembly process optimization.

Skills

FC-BGA
ASIC package design
OSAT coordination
High-pin-count packaging

Education

Bachelor's degree in Packaging Eng./MechEng/ElecEng

Tools

SIWave
HFSS
ADS

Job description

K2 Space in Seattle is seeking a Senior ASIC Package Design Engineer to implement advanced FC-BGA/MCM package architecture for high-performance SoCs. You will drive end-to-end package strategy from architecture to production ramp, collaborating with silicon, RF, and systems teams to optimize die floorplans and interfaces.

The role demands 5+ years in ASIC packaging, deep FC-BGA expertise, and hands-on experience with OSATs, substrate vendors, and SI/PI/thermal design.

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