Senior ASIC Digital Design Engineer — LPDDR PHY RTL Expert

Synopsys Inc; Boxborough (MA); On-site; USD 150,000 - 210,000; Full time

Job summary

Synopsys Inc is seeking an experienced ASIC digital design engineer to contribute to LPDDR PHY IP in production silicon. You will own RTL design, contribute to timing closure, power optimization, and design quality across advanced process nodes.

You will collaborate across architecture, verification, and physical design teams, developing automation and supporting design reviews to drive robust, high-performance IP on a global scale.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 5+ years of ASIC digital design experience with RTL ownership in production silicon.
• Expert Verilog proficiency for timing-critical designs.
• Strong Perl scripting skills for design automation.
• Deep knowledge of synthesis, timing analysis, and power optimization.
• Experience with PHY IP or high-speed interfaces is preferred.

Responsibilities

• Design RTL modules for LPDDR PHY IP from microarchitecture through synthesis-ready implementation.
• Optimize designs to meet timing, power, and area targets across multiple process nodes.
• Develop automation for design generation and flow integration.
• Collaborate with cross-functional teams to resolve timing and power challenges.
• Contribute to design reviews and methodology development.

Skills

Verilog

Perl scripting

Synthesis & timing

Power optimization

RTL ownership

Education

Bachelor's or Master's degree in Electrical/Computer Engineering or related field

Job description

Synopsys Inc is seeking an experienced ASIC digital design engineer to contribute to LPDDR PHY IP in production silicon. You will own RTL design, contribute to timing closure, power optimization, and design quality across advanced process nodes.

You will collaborate across architecture, verification, and physical design teams, developing automation and supporting design reviews to drive robust, high-performance IP on a global scale.