Senior ASIC Design Architect & Systems Leader

Zerto; Westford (MA); On-site; Confidential; Full time

Job summary

Hewlett Packard Enterprise is seeking a Distinguished Technologist, ASIC Design Architect to own the hardware architecture from concept through tape-out and silicon bring-up. The role blends deep system/RTL know-how with hands-on leadership to define requirements, partition silicon blocks, and drive tradeoffs for performance, power, area and schedule.

The candidate will mentor teams, coordinate with product management, firmware, verification and foundry partners to deliver complex ASICs on time

Qualifications

• Bachelor's or master's degree in electrical engineering, Computer Engineering or related field.
• 15+ years of ASIC design experience with progressive ownership of architecture/microarchitecture; proven record of tape-out(s).
• Strong datapath and system architecture skills: packet pipelines or equivalent high-throughput streaming architectures.
• Experience integrating high-speed SerDes/PHY, MAC/PCS, and external memory controllers (DDR/HBM).
• Excellent cross-functional communication skills; ability to drive tradeoffs with product management, firmware, verification, PD and foundry teams.

Responsibilities

• Define system and chip-level architecture based on product requirements (throughput, latency, features, power, area, cost).
• Translate system requirements into microarchitecture, interfaces, and verification strategy.
• Architect high-performance datapaths, control planes, memory subsystems, and I/O to meet PPA targets.
• Mentor and grow engineering teams; promote architecture best practices and cross-discipline communication.
• Balance technical decisions with schedule, risk and business priorities; present tradeoffs and roadmaps.

Skills

Few cross-functional leadership

Mentor engineering teams

Tradeoff analysis

High-performance datapaths

System and RTL expertise

Education

Bachelor's or master's degree in electrical engineering or computer engineering

Tools

SerDes/PHY integration

MAC/PCS interfaces

DDR/HBM memory controllers

Job description

Hewlett Packard Enterprise is seeking a Distinguished Technologist, ASIC Design Architect to own the hardware architecture from concept through tape-out and silicon bring-up. The role blends deep system/RTL know-how with hands-on leadership to define requirements, partition silicon blocks, and drive tradeoffs for performance, power, area and schedule.

The candidate will mentor teams, coordinate with product management, firmware, verification and foundry partners to deliver complex ASICs on time