Senior Analog SerDes Architect for High-Speed Optical Links

Intel Corporation; Santa Clara (CA); On-site; USD 214,730 - 303,140; Full time

Benefits offered by this job

Competitive salary

Health benefits

Retirement programs

Vacation benefits

Stock options

Job summary

A leading semiconductor company seeks a Lead Analog SerDes Architect/Design Engineer to shape the future of data center connectivity in Santa Clara, CA. The ideal candidate will have a strong background in high-speed serial link design, with hands-on experience in analog CMOS/BiCMOS technologies. Responsibilities include defining circuit architectures, guiding junior designers, and collaborating on integrated circuit components. Join this innovative team to drive next-generation bandwidth growth and influence advanced photonic developments.

Qualifications

• 8+ years of experience in high-speed serial links.
• Experience designing SerDes blocks for data rates 28Gbps+.
• Hands-on circuit design experience in deep sub-micron technologies.

Responsibilities

• Define circuit architecture for optical interconnects.
• Work collaboratively on block level development.
• Guide junior designers and develop test plans.

Skills

High-speed serial link design

Analog CMOS/BiCMOS design

Circuit design experience of SerDes blocks

Mixed-signal design flow

Precision analog circuit design

Education

MS in Electrical Engineering

Tools

Circuit design software

Job description

A leading semiconductor company seeks a Lead Analog SerDes Architect/Design Engineer to shape the future of data center connectivity in Santa Clara, CA. The ideal candidate will have a strong background in high-speed serial link design, with hands-on experience in analog CMOS/BiCMOS technologies. Responsibilities include defining circuit architectures, guiding junior designers, and collaborating on integrated circuit components. Join this innovative team to drive next-generation bandwidth growth and influence advanced photonic developments.