Principal Analog IC Designer - High-Speed SerDes Expert

Cadence; San Jose (CA); On-site; USD 137,000 - 254,000; Full time

Benefits offered by this job

401(k) match

Employee stock purchase plan

Medical, dental, and vision plans

Paid vacation & holidays

Bonus & equity

Job summary

Cadence in California seeks a Principal Analog IC Designer responsible for designing and developing analog/mixed-signal circuit blocks from concept through verification, ensuring conformance to customer specifications.

Candidates should have 7+ years in CMOS SerDes or high-speed I/O, strong jitter and SI knowledge, Cadence CAD tools expertise, and MS or PhD in EE; salary range and benefits are provided. Collaborate with teams to meet performance goals and schedules.

Qualifications

• Minimum of 7 years in CMOS SerDes or high-speed I/O IC design.
• Jitter and signal equalization techniques understood.
• Cadence tool experience, lab test experience, and >10Gbps and <28nm design experience a plus.
• MS or PhD in EE.

Responsibilities

• Design and develop analog/mixed-signal IC blocks from concept to verification.
• Ensure conformance to customer specifications through final verification.
• Collaborate with cross-functional teams and use CAD tools for simulation and layout.

Skills

CMOS SerDes Design

High-speed I/O

Jitter & signal integrity

Analog/mixed-signal design

Circuit simulation

Lab/test experience

Team collaboration

Education

MS or PhD in EE

Tools

Cadence CAD tools

Layout & physical verification tools

Job description

Cadence in California seeks a Principal Analog IC Designer responsible for designing and developing analog/mixed-signal circuit blocks from concept through verification, ensuring conformance to customer specifications.

Candidates should have 7+ years in CMOS SerDes or high-speed I/O, strong jitter and SI knowledge, Cadence CAD tools expertise, and MS or PhD in EE; salary range and benefits are provided. Collaborate with teams to meet performance goals and schedules.