Senior Analog IC Design & Verification Engineer (RSU Equity)

Future Ventures; California (MO); On-site; USD 125,000 - 291,000; Full time

Benefits offered by this job

Excellent medical, dental, and vision

Equity (RSUs)

Paid holidays

401(k) plan

Parental leave

Flexible time off

Job summary

Neuralink is seeking an engineer to design analog and mixed-signal ICs, from circuit design to layout and verification, with responsibility for high-performance blocks and IP validation. The role involves planning verification, running simulations, mentoring juniors, and coordinating with internal/external users and vendors.

The ideal candidate has a BS in electrical engineering with 5+ years' experience in CMOS analog/mixed-signal design and strong problem-solving skills.

Qualifications

• BS degree in electrical engineering or related field with at least 5 years of analog/mixed-signal CMOS experience.
• Proven silicon validation experience in delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, or high-speed PHY/SERDES.
• Strong analytical, problem-solving mindset and ability to work on complex IP.

Responsibilities

• Design analog blocks and subsystems at transistor level to meet noise, distortion and power goals.
• Oversee block-level layout with layout teams and verify designs via simulations.
• Plan and execute analog verification, run advanced simulations and analyses for IP/chip portions.
• Develop tests, mentor juniors, analyze bugs, and coordinate with internal or external users and vendors.

Skills

Analog circuit design

Mixed-signal design

Circuit verification

Layout coordination

Problem solving

Education

Bachelor of Science in Electrical Engineering

Tools

Verilog-AMS

SystemVerilog

FinFET CMOS design

Job description

Neuralink is seeking an engineer to design analog and mixed-signal ICs, from circuit design to layout and verification, with responsibility for high-performance blocks and IP validation. The role involves planning verification, running simulations, mentoring juniors, and coordinating with internal/external users and vendors.

The ideal candidate has a BS in electrical engineering with 5+ years' experience in CMOS analog/mixed-signal design and strong problem-solving skills.