Sr. Verification Engineer

AMC OU Ambarella Corp; United States; On-site; USD 165,000 - 175,000; Full time

Benefits offered by this job

RSU grants

Annual RSU grants

Competitive benefits

Job summary

Ambarella is seeking an experienced Senior Verification Engineer to lead verification of advanced SoCs for edge AI vision applications. You will own verification strategies, develop scalable testbenches, and drive coverage closure across image processing, DSP, CPUs, and neural network accelerators.

You will mentor engineers, collaborate with architecture, firmware, and software teams, and advance agentic AI verification flows to improve automation and efficiency.

Qualifications

• Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• Typically 5+ years of ASIC or SoC verification experience, or equivalent expertise.
• Deep knowledge of SystemVerilog, UVM, constrained-random verification, assertions, and coverage methodologies.
• Experience architecting complex verification environments and driving coverage closure.
• Strong understanding of digital design, computer architecture, and SoC integration.
• Advanced RTL and system-level debugging skills.
• Strong programming skills in C/C++ and Python.
• Experience with commercial simulation, debugging, and coverage tools.
• Ability to independently lead verification projects and collaborate across teams.

Responsibilities

• Define and execute verification strategies and test plans for complex digital IP, subsystems, and SoCs.
• Architect and develop reusable verification environments using SystemVerilog, UVM, Verilog, C/C++, and Python.
• Lead verification of image processing pipelines, video input, compression engines (including CABAC), DSP blocks, processor cores, and neural network accelerators.
• Develop constrained-random tests, reference models, assertions, scoreboards, and coverage models.
• Drive functional and code coverage closure and lead complex RTL and system-level debugging.
• Use, enhance, and extend agentic AI verification workflows for test generation, coverage analysis, failure triage, debugging, and regression automation.
• Collaborate with internal AI experts to identify opportunities for improving verification workflows and integrating new capabilities.
• Develop automation tools and optimize simulation and regression efficiency.
• Collaborate with architecture, RTL design, firmware, and software teams.
• Mentor junior engineers and interns, review verification deliverables, and provide technical leadership.

Skills

SystemVerilog

UVM

Python

C/C++

Verilog

Education

Master's degree in Electrical Engineering, Computer Engineering, or a related field

Tools

Commercial simulation tools

Debugging tools

Coverage tools

Job description

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams. Job Description Ambarella is seeking an experienced Senior Verification Engineer to lead verification of advanced SoCs incorporating image and video processing, DSP, CPUs, and neural network accelerators. You will own verification strategies, develop scalable testbenches, drive coverage closure, and resolve complex design issues. Ambarella's verification methodology increasingly incorporates agentic AI verification flows. You will use and improve these capabilities in collaboration with internal AI experts, helping advance verification efficiency, quality, and automation.

Key Responsibilities

• Define and execute verification strategies and test plans for complex digital IP, subsystems, and SoCs.


• Architect and develop reusable verification environments using SystemVerilog, UVM, Verilog, C/C++, and Python.


• Lead verification of image processing pipelines, video input, compression engines (including CABAC), DSP blocks, processor cores, and neural network accelerators.


• Develop constrained-random tests, reference models, assertions, scoreboards, and coverage models.


• Drive functional and code coverage closure and lead complex RTL and system-level debugging.


• Use, enhance, and extend agentic AI verification workflows for test generation, coverage analysis, failure triage, debugging, and regression automation.


• Collaborate with internal AI experts to identify opportunities for improving verification workflows and integrating new capabilities.


• Develop automation tools and optimize simulation and regression efficiency.


• Collaborate with architecture, RTL design, firmware, and software teams.


• Mentor junior engineers and interns, review verification deliverables, and provide technical leadership.

Qualifications

• Master's degree in Electrical Engineering, Computer Engineering, or a related field.


• Typically 5+ years of ASIC or SoC verification experience, or equivalent expertise.


• Deep knowledge of SystemVerilog, UVM, constrained-random verification, assertions, and coverage methodologies.


• Experience architecting complex verification environments and driving coverage closure.


• Strong understanding of digital design, computer architecture, and SoC integration.


• Advanced RTL and system-level debugging skills.


• Strong programming skills in C/C++ and Python.


• Experience with commercial simulation, debugging, and coverage tools.


• Ability to independently lead verification projects and collaborate across teams.

Preferred Qualifications

• Experience verifying complex video, image processing, DSP, or AI accelerator SoCs.


• Knowledge of video compression, memory subsystems, and processor architectures.


• Hands-on experience with AI-assisted verification, LLMs, or agentic AI workflows.


• Experience improving verification automation, regression infrastructure, and simulation efficiency.


• Familiarity with AI agent frameworks and their integration into engineering workflows.


• Experience mentoring engineers and driving verification methodology improvements.

We value engineers who combine deep verification expertise with the ability to leverage emerging AI technologies. Prior experience developing AI infrastructure is beneficial but not required. The base salary range is $165,000 - $175,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The successful candidate will have the opportunity to convert to a full-time regular position. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits. Combining technical expertise and a commitment to quality, Ambarella has established itself as the industry standard for excellence in video performance by offering pristine imagery, efficient compression, and low-power operation. For our next phase of growth, we are looking for talented team members to help us deliver our advanced computer vision algorithms to tomorrow’s intelligent video products. Our target applications include autonomous vehicles, intelligent video surveillance, self-flying drones, smart wearable cameras, 360-degree immersive video, and more.