Senior 3D Stacked Memory Architect - Lead Innovation

Micron Technology; Boise (ID); On-site; USD 177,000 - 387,000; Full time

Benefits offered by this job

Medical/Dental/Vision plans

Paid time off

Equity

Job summary

Micron Technology in the United States seeks a Senior Memory Architect to define 3D stacked memory architectures that span die, stack, packaging and system. You will lead through technical depth, guide major architectural decisions and translate bold ideas into production reality.

The role requires a strong background in stacked memory, high-speed I/O and memory system design, with leadership experience across engineering teams and collaboration with customers and platform partners.

Qualifications

• Bachelor's degree required in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Extensive experience in stacked memory, 3D integration, advanced packaging, or high-performance semiconductor architecture.
• Deep hands-on expertise in high-speed I/O, TSV-based stacking, power delivery, thermals, and signal integrity.

Responsibilities

• Define next-generation 3D stacked memory architectures spanning bandwidth, capacity, power efficiency, and RAS.
• Lead die-to-system co-optimization across memory die, PHY, TSVs, bonding, packaging, and system integration.
• Architect stack-aware RAS, telemetry, and reliability mechanisms for high-density memory systems.
• Drive long-range technology strategy for stacked memory and advanced packaging.
• Engage deeply with customers, platform partners, and standards bodies to influence system and ecosystem direction.

Skills

3D stacked memory

Memory architecture

High-speed I/O

System-level co-optimization

Technical leadership

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science

Job description

Micron Technology in the United States seeks a Senior Memory Architect to define 3D stacked memory architectures that span die, stack, packaging and system. You will lead through technical depth, guide major architectural decisions and translate bold ideas into production reality.

The role requires a strong background in stacked memory, high-speed I/O and memory system design, with leadership experience across engineering teams and collaboration with customers and platform partners.