Security IP Verification Engineer (Embedded)

Semiconductor Engineering; Austin (TX); On-site; USD 120,000 - 170,000; Full time

Job summary

Semiconductor Engineering is seeking a Security and Embedded Processor Verification Engineer to shape the verification of Hardware Security IP and subsystems. You will lead test plan development, build UVM-based testbenches, and implement verification strategies across the team.

You will craft test plans, develop UVM, SystemVerilog/Verilog and C testbenches, and debug test failures. You will collaborate with design teams for sign-off and optimization, while mentoring junior engineers and

Qualifications

• Experience crafting test plans and testbenches for security IP verification.
• Proficiency with UVM-based verification environments and SystemVerilog/Verilog.
• Ability to debug test failures and mentor team members.

Responsibilities

• Define and realize Hardware Security IP and Subsystem verification.
• Develop test plans, testbenches, verification models and strategies.
• Collaborate with design team for functional sign-off and coverage.
• Mentor team members and coordinate with Project Management on plans and schedules.

Skills

UVM

SystemVerilog

Verilog

C testbenches

debugging

test plans

mentoring

Tools

UVM

SystemVerilog

Verilog

C

Job description

Semiconductor Engineering is seeking a Security and Embedded Processor Verification Engineer to shape the verification of Hardware Security IP and subsystems. You will lead test plan development, build UVM-based testbenches, and implement verification strategies across the team.

You will craft test plans, develop UVM, SystemVerilog/Verilog and C testbenches, and debug test failures. You will collaborate with design teams for sign-off and optimization, while mentoring junior engineers and