Secure ASIC Design & Integration Engineer – RTL & Crypto

Anysilicon; Cupertino, Northern (CA, KY); Hybrid; USD 120,000 - 160,000; Full time

Job summary

Apple's Silicon Security team seeks an ASIC Design Engineer to develop secure subsystems for the Apple SoC. This role involves designing advanced hardware defenses against side channel attacks and safeguarding sensitive customer data across Apple products.

Responsibilities include integrating security IPs into secure subsystems, ensuring compliance with timing, performance, and security standards, and driving front-end quality flows from RTL to netlist.

Qualifications

• BS in Electrical Engineering or Computer Engineering, or a relevant field.
• 0 years of experience required.

Responsibilities

• Architect and design security features with Platform Architecture and Verification teams.
• Integrate security IPs into secure subsystems meeting timing, performance, and security standards.
• Resolve integration issues across IP blocks and coordinate with IP owners on interfaces and functionality.
• Drive front-end quality flows from RTL to netlist, including Lint, CDC/RDC analysis, UPF development, timing and synthesis.
• Utilize AI-assisted tools to improve design quality and productivity.

Skills

RTL design

CDC/RDC analysis

UPF

Synthesis & timing

Cryptography

Hardware security

Clock/Reset architecture

AMBA (AXI/AHB/APB)

Education

Bachelor's degree in Electrical/Computer Engineering

Job description

Apple's Silicon Security team seeks an ASIC Design Engineer to develop secure subsystems for the Apple SoC. This role involves designing advanced hardware defenses against side channel attacks and safeguarding sensitive customer data across Apple products.

Responsibilities include integrating security IPs into secure subsystems, ensuring compliance with timing, performance, and security standards, and driving front-end quality flows from RTL to netlist.