RTL Design Engineer: Shape Next‑Gen CPU IP

Intel; Hillsboro (OR); On-site; USD 91,000 - 129,000; Full time

Job summary

Intel in Oregon is seeking a College Grad RTL Design Engineer to help shape core CPU logic and architecture. You will develop RTL coding and simulation for CPU IP blocks and contribute to full chip integration, impacting power, performance and efficiency.

Join the CPU Design Team on-site in Hillsboro to define architectural features, review verification plans, and resolve RTL test failures, collaborating across disciplines and learning from leading engineers.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or related field; 3+ months of educational or work experience.
• Master's degree in the same field is acceptable as alternative.
• RTL design experience with SystemVerilog is required.

Responsibilities

• Design and implement logic for CPU features using RTL coding.
• Optimize logic to meet power, performance, area, and timing goals.
• Collaborate on defining architectural and microarchitectural features of the CPU.
• Review verification plans to ensure design correctness.
• Resolve RTL test failures to achieve feature accuracy.

Skills

CPU architecture fundamentals

Digital design principles

Collaborative teamwork

Education

Bachelor's degree in Electrical/Computer Engineering or related field

Master's degree in Electrical/Computer Engineering or related field

Tools

SystemVerilog

Job description

Intel in Oregon is seeking a College Grad RTL Design Engineer to help shape core CPU logic and architecture. You will develop RTL coding and simulation for CPU IP blocks and contribute to full chip integration, impacting power, performance and efficiency.

Join the CPU Design Team on-site in Hillsboro to define architectural features, review verification plans, and resolve RTL test failures, collaborating across disciplines and learning from leading engineers.