RTL Design Engineer for AI ASICs & High-Speed Digital

Etched; San Jose (CA); Sur place; USD 150 000 - 190 000; Plein temps

Avantages offerts par ce poste

Medical, dental, and vision packages

Housing subsidy of $2k per month

Relocation support

Daily lunch + dinner in the office

Résumé du poste

A cutting-edge AI technology firm in San Jose is seeking an experienced RTL Engineer to develop and implement design verification strategies for advanced ASIC designs. You will ensure the correct and efficient operation of AI chips. The ideal candidate has at least 5 years of experience in RTL development, is proficient in digital logic, and is eager to learn about modern AI technologies. Benefits include extensive medical coverage and housing subsidies.

Qualifications

• At least 5 years of work experience in RTL development.
• Proficiency in standard RTL design and synthesis tools.
• Familiarity with verification work and writing test benches.

Responsabilités

• Develop and implement design verification strategies for ASIC designs.
• Provide feedback to ensure blocks meet timing and area constraints.

Connaissances

RTL development

High-speed digital logic

Standard RTL design and synthesis tools

Verification work and writing test benches

Learning about transformers and AI

Outils

Python

Description du poste

A cutting-edge AI technology firm in San Jose is seeking an experienced RTL Engineer to develop and implement design verification strategies for advanced ASIC designs. You will ensure the correct and efficient operation of AI chips. The ideal candidate has at least 5 years of experience in RTL development, is proficient in digital logic, and is eager to learn about modern AI technologies. Benefits include extensive medical coverage and housing subsidies.