RISC-V Linux Kernel Architect for High-Performance Servers

SiFive, Inc.; Santa Clara (CA); On-site; USD 180,000 - 280,000; Full time

Job summary

SiFive, the pioneer of RISC-V, seeks an experienced Linux kernel software architect to enhance and debug the RISC-V Linux kernel for high core count server systems. You will interact with upstream communities, post patches, and solve complex issues across software and hardware boundaries.

You'll collaborate with system software, validation, and hardware teams to improve core and system designs on SiFive platforms, including emulation environments and FPGA-based workflows.

Qualifications

• Experience writing and reviewing patches for the upstream Linux kernel.
• Ability to debug challenging software and hardware bugs in CPUs/SoCs.
• Familiarity with RISC-V architecture and Linux on FPGA/emulation platforms.

Responsibilities

• Improve and debug the RISC-V Linux kernel for high core count server systems.
• Collaborate with upstream Linux/OpenSBI communities; post/review patches.
• Work with hardware/RTL teams to refine core and system designs.

Skills

Linux kernel

Patches & upstream

RISC-V familiarity

Debugging complex systems

FPGA/Emulation

Tools

OpenSBI

Job description

SiFive, the pioneer of RISC-V, seeks an experienced Linux kernel software architect to enhance and debug the RISC-V Linux kernel for high core count server systems. You will interact with upstream communities, post patches, and solve complex issues across software and hardware boundaries.

You'll collaborate with system software, validation, and hardware teams to improve core and system designs on SiFive platforms, including emulation environments and FPGA-based workflows.