RF & Analog/Mixed-Signal Design Engineer

Apple; Austin (TX); On-site; USD 180,000 - 230,000; Full time

Job summary

Apple Inc. in Austin, TX seeks a senior analog/mixed-signal design engineer to define and document functional and performance requirements for high-speed blocks and chips. You will work on transistor-level circuits, SERDES, clocking architectures, and reliability testing to ensure robust, power-efficient designs.

The role involves Virtuoso-based design, RTL/Verilog modeling, MATLAB analysis, and post-silicon validation while collaborating across teams on next-generation semiconductor projects.

Qualifications

• Master's degree or foreign equivalent in Electrical Engineering, Computer Engineering, Electronics Engineering, or related field.
• Designing and analyzing high-speed analog and mixed-signal building blocks including PLL, LDO, ADC, DAC and Phase-Interpolator.
• Leveraging end-to-end SERDES systems including TX/RX design and channel characteristics and equalization techniques.
• Utilizing RTL/Verilog modeling to develop models for mixed-signal blocks to help with system level design verification.
• Modeling MATLAB for performance analysis of SERDES (jitter tolerance, equalization analysis).
• Leveraging testing equipment including spectrum analyzers, oscilloscope, and signal generators for post-silicon validation and testing.
• Utilizing layout techniques for analog and high-speed circuits including matching, noise to ensure the post-layout performance.
• Leveraging signal processing for design and analysis including filtering, equalization, and spectral analysis.
• Using Python and Shell scripting to automate design simulations and for data analysis.
• Utilizing design validation tools including EMIR, static timing analysis, and DFT to ensure design robustness and manufacturability.

Responsibilities

• Define and document functional and performance requirements for blocks and chips to meet system-level goals for high-speed, low-power communication.
• Design and test transistor-level analog and mixed-signal circuits using Virtuoso and related environments.
• Conduct block-level verification through simulations to ensure performance, power, and area targets.
• Design clock distribution circuits and CDR blocks to achieve low jitter and robust performance.
• Investigate power-efficient clocking architectures to reduce chip power consumption.
• Design and optimize DCC and Phase Interpolator blocks to improve clock quality while minimizing power.
• Design a 100MHz reference clock receiver with careful layout and termination to minimize reflections and headroom issues.
• Perform environment testing and reliability analysis under process, temperature, and voltage variations.

Skills

PLL design

LDO design

ADC/DAC design

Phase Interpolator

SERDES TX/RX design

Python scripting

Verilog/RTL modeling

Education

Master's Degree in Electrical Engineering or related field

Tools

Verilog

MATLAB

RTL/Verilog

Oscilloscope

Job description

Apple Inc. in Austin, TX seeks a senior analog/mixed-signal design engineer to define and document functional and performance requirements for high-speed blocks and chips. You will work on transistor-level circuits, SERDES, clocking architectures, and reliability testing to ensure robust, power-efficient designs.

The role involves Virtuoso-based design, RTL/Verilog modeling, MATLAB analysis, and post-silicon validation while collaborating across teams on next-generation semiconductor projects.