Senior Mixed-Signal RTL Design Engineer

Apple Inc.; Sunnyvale (CA); On-site; USD 185,000 - 325,000; Full time

Benefits offered by this job

Stock options

Medical benefits

Tuition reimbursement

Relocation assistance

Employee discounts

Job summary

Apple Inc. is seeking an experienced RTL Design engineer to contribute to advanced mixed-signal circuit blocks in Cupertino.

You will write RTL code, create detailed design specs, and collaborate closely with system architects, circuit designers, and design verification engineers to ensure high-quality silicon. Responsibilities include driving timing closure with the PD team, using LINT/CDC/RDC tools, and supporting silicon bring-up.

Qualifications

• Bachelor's degree in Electrical Engineering with 10+ years of experience preferred.
• Deep knowledge of RTL design and Verilog/SystemVerilog.
• Experience collaborating with physical design teams and PD timing closure.
• Familiarity with LINT, CDC, RDC and design verification techniques.

Responsibilities

• RTL coding of blocks for advanced mixed-signal circuits.
• Write detailed design specifications and collaborate with system architect and designers.
• Use formal tools to guarantee RTL quality and support design verification.
• Assist timing closure and silicon bring-up with the PD team.

Skills

RTL design

Verilog

SystemVerilog

Mixed-signal concepts

Algorithm development

Scripting languages

Communication skills

Education

Bachelor's degree in Electrical Engineering

Tools

Verilog simulators

linters

clock domain crossing checkers

Synthesis

DFT

Job description

Apple Inc. is seeking an experienced RTL Design engineer to contribute to advanced mixed-signal circuit blocks in Cupertino.

You will write RTL code, create detailed design specs, and collaborate closely with system architects, circuit designers, and design verification engineers to ensure high-quality silicon. Responsibilities include driving timing closure with the PD team, using LINT/CDC/RDC tools, and supporting silicon bring-up.