Senior Mixed-Signal RTL Design Engineer

Apple Inc.; Cupertino (CA); Presencial; USD 185.000 - 325.000; Jornada completa

Descripción de la vacante

Apple Inc. in Cupertino, CA, is seeking an engineer to RTL code blocks for advanced mixed-signal circuits (digital side). You will write detailed design specifications and work closely with the system architect, circuit designers and design verification engineers to deliver high-quality silicon.

Formal tools like LINT, CDC, RDC will be used to guarantee RTL quality. You will support design verification, assist timing closure with the PD team, and help bring up silicon, ensuring robust, scalable

Formación

• Bachelor's of Science in Electric Engineering with 10+ years of relevant experience preferred.
• Deep knowledge of RTL design and Verilog/SystemVerilog.
• Experience collaborating with PD teams and design verification engineers.

Responsabilidades

• RTL coding of blocks for advanced mixed-signal circuits (digital side).
• Write detailed design specifications and collaborate with system architect, circuit designers and verification engineers.
• Use formal tools like LINT, CDC, RDC to guarantee RTL quality.
• Support design verification to ensure bug-free silicon.
• Work with the PD team for timing closure and silicon bring-up.

Conocimientos

RTL design

Verilog

SystemVerilog

Mixed-signal concepts

Algorithm development

Front-end tools

Scripting languages

Communication/presentation

Educación

Bachelor's of Science in Electric Engineering

Herramientas

Verilog simulators

Linters

Clock-domain crossing checkers

Synthesis

Static timing

DFT

SystemVerilog assertions

Design verification techniques

Perl

Python

Descripción del empleo

Apple Inc. in Cupertino, CA, is seeking an engineer to RTL code blocks for advanced mixed-signal circuits (digital side). You will write detailed design specifications and work closely with the system architect, circuit designers and design verification engineers to deliver high-quality silicon.

Formal tools like LINT, CDC, RDC will be used to guarantee RTL quality. You will support design verification, assist timing closure with the PD team, and help bring up silicon, ensuring robust, scalable