Remote RTL Front-End Design Engineer for AI Hardware

Turing; United States; Remote; USD 96.000 - 165.000; Vollzeit

Benefits dieser Stelle

Work in a fully remote environment

Cutting-edge AI projects with leadingL

Zusammenfassung

Turing is seeking a front-end design engineer to create RTL design tasks for evaluating AI hardware models. You will turn real IP into precise RTL designs, fix bugs, and optimize for PPA across area, power, and timing.

The role emphasizes writing RTL, passing through synthesis, and explaining the resulting area, timing, and power. This is a contractor arrangement with fully remote work, overlapping PST hours.

Qualifikationen

• BS/MS in Electrical, Electronic, or Computer Engineering or equivalent practical experience.
• 3+ years of front-end digital design on ASIC/FPGA projects, RTL through synthesis.
• Fluent Verilog / SystemVerilog: microarchitecture, datapaths, FSMs, pipelines, FIFOs, clock-domain crossings, clock gating.

Aufgaben

• Author design tasks: turn real IP into precise RTL design, bug-fix, and PPA tasks with a reference solution.

Kenntnisse

RTL design

Verilog/SystemVerilog

Python

Linux

Git & Docker

Ausbildung

BS/MS in Electrical, Electronic, or Computer Engineering

Tools

Cadence Genus

Synopsys Design Compiler / Fusion Compiler

AMD Vivado (Vitis HLS)

Yosys

Icarus Verilog

Verilator

Jobbeschreibung

Turing is seeking a front-end design engineer to create RTL design tasks for evaluating AI hardware models. You will turn real IP into precise RTL designs, fix bugs, and optimize for PPA across area, power, and timing.

The role emphasizes writing RTL, passing through synthesis, and explaining the resulting area, timing, and power. This is a contractor arrangement with fully remote work, overlapping PST hours.