R&D Engineer IC Design 5

Broadcom

San Jose (CA)

On-site

USD 144,000 - 230,000

Full time

14 days+
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Benefits offered by this job

Discretionary annual bonus
Equity grants & annual equity awards
401(k) matching
Employee Stock Purchase Program (ESPP)

Job summary

Broadcom in San Jose, CA seeks an experienced ASIC verification engineer to join the system-level verification team. You will develop complex verification environments, build test plans, and verify high‑performance network switch ASICs/SoCs across ASIC/FPGA implementations.

The ideal candidate has 8+ years in ASIC design/verification, strong Verilog and C/C++, UVM/SystemVerilog, and a track record of multiple tape-outs from concept to production; excellent English communication across

Qualifications

  • Experience: 8+ years of ASIC design/verification experience, including a complete understanding of Verilog design and hands‑on experience with C/C++.
  • Education: Bachelor's in Engineering
  • Methodologies & Languages: Strong working knowledge of object-oriented programming (OOP) and modern ASIC verification flows (e.g., UVM/SystemVerilog).
  • Technical Depth: Complete mastery of Verilog for simulation and familiarity with ASIC design flows for deep sub‑micron technologies.
  • Domain Knowledge: Experience with networking protocols (e.g., Ethernet, PCIe, routing/switching) is a major plus.
  • Track Record: Must have completed multiple ASIC tape‑outs, with at least one project taken from initial concept through full production.
  • Communication: Fully comfortable with technical and business English across documentation, cross‑functional collaboration, and executive communications.

Responsibilities

  • Develop complex verification environments for ASICs.
  • Create comprehensive test plans and scenarios.
  • Verify high-performance network switch ASIC/FPGA.
  • Collaborate with system architects, design engineers, and verification teams.
  • Lead testbenches from concept to production across multiple tape-outs.

Skills

Verilog design/verification
C/C++
UVM
SystemVerilog
Networking protocols
Tape-out experience
Business English communication
Cross-functional collaboration

Education

Bachelor's in Engineering

Job description

USA-California-San Jose-1320 Ridder Park Drive

USA-CA San Jose Innovation Drive

Full time

R026760

Job Description:

This individual will be a key member of the ASIC system-level verification team. Responsibilities include developing complex verification environments, creating comprehensive test plans, and verifying high-performance network switch ASIC/FPGAs. The role involves hands‑on implementation across every aspect of ASIC verification while collaborating closely with system architects, design engineers, and verification teams. The ideal candidate will have a proven track record of completing multiple successful ASIC design and verification cycles—from architecting testbenches (networking background preferred) to achieving full verification closure.

Education & Experience
  • Experience: 8+ years of ASIC design/verification experience, including a complete understanding of Verilog design and hands‑on experience with C/C++.

  • Education: Bachelor's in Engineering

  • Methodologies & Languages: Strong working knowledge of object-oriented programming (OOP) and modern ASIC verification flows (e.g., UVM/SystemVerilog).

  • Technical Depth: Complete mastery of Verilog for simulation and familiarity with ASIC design flows for deep sub‑micron technologies.

  • Domain Knowledge: Experience with networking protocols (e.g., Ethernet, PCIe, routing/switching) is a major plus.

  • Track Record: Must have completed multiple ASIC tape‑outs, with at least one project taken from initial concept through full production.

  • Communication: Fully comfortable with technical and business English across documentation, cross‑functional collaboration, and executive communications.

Compensation and Benefits

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Welcome! Thank you for your interest in Broadcom!

We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

For more information please visit our video library (http://www.broadcom.com/videos) and check out our Connected by Broadcom (https://www.broadcom.com/support/resources/video-webinar-library?channel=5c9658f7c1d34eca91c6cc16178e5b1b&video=7d72b04ea50046a394e682fab640ce20) series.

Follow us on Linked In Broadcom Inc (https://www.linkedin.com/company/broadcom) .

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