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Broadcom is seeking an experienced verification lead to architect and implement scalable testbench environments for Block/Core/SOC verification in a high‑level ASIC flow. You will drive verification plans, create pseudo‑random test strategies, and close coverage gaps while mentoring junior engineers.
You should have extensive SystemVerilog/UVM experience, strong debug skills, and familiarity with PCIe or similar protocols. This role is based in San Jose, CA, with a competitive benefit package.
USA-California-San Jose-1320 Ridder Park Drive
Full time
R027132
The annual base salary range for this position is USD 143,800.00 To USD 230,000.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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