Process Integration & Defect Reduction Engineer

Intel; Albuquerque (NM); On-site; USD 121,000 - 171,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Vacation

Job summary

Intel’s NM Si Mfg Yield team seeks Process Integration and Defect Reduction Engineers to support backend interconnect and advanced packaging semiconductor fabrication, focusing on Foveros and EMIB technologies in Fab 11X. You will partner across Yield Engineering to sustain process health as products transition to high-volume manufacturing and drive yield, quality, reliability, cost improvements.

You will design experiments, analyze yield data, and optimize processes while transferring new

Qualifications

• Bachelor's or Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, Materials Science, Microelectronics Engineering, Chemistry, Physics, or related technical field.
• 3+ years of experience in the semiconductor industry.
• Experience applying Design of Experiments (DOE) methodologies.
• Experience in data analysis and statistical process control using tools such as JMP, SQL, PCS, or similar platforms.
• Knowledge of semiconductor manufacturing process flow, advanced packaging technologies, and process capability.

Responsibilities

• Design and execute experiments to optimize manufacturing processes.
• Analyze process and yield data to drive improvements in yield, quality and cost.
• Manage technology change introductions and monitor inline defectivity and parametric performance.
• Investigate process excursions, identify root causes, and implement corrective actions.
• Support the transfer of new products from TD into manufacturing and ensure readiness for high-volume production.

Skills

Team leadership

Problem solving

Communication

Data analysis

Cross-functional collaboration

Project management

Education

Bachelor's or Master's in relevant field

Tools

DOE methodologies

JMP

SQL

PCS

Job description

Intel’s NM Si Mfg Yield team seeks Process Integration and Defect Reduction Engineers to support backend interconnect and advanced packaging semiconductor fabrication, focusing on Foveros and EMIB technologies in Fab 11X. You will partner across Yield Engineering to sustain process health as products transition to high-volume manufacturing and drive yield, quality, reliability, cost improvements.

You will design experiments, analyze yield data, and optimize processes while transferring new