Process Engineer – Die to Wafer Hybrid Bonding

Applied Materials; Santa Clara (CA); On-site; USD 147,000 - 202,500; Full time

Benefits offered by this job

Supportive work culture for learning and development

Job summary

Applied Materials is seeking a Process Engineer in Santa Clara, CA, to design and optimize manufacturing processes for display and semiconductor technologies. This role involves analyzing data, engaging with customers, and troubleshooting engineering issues.

The ideal candidate will hold an M.S. or Ph.D. in a relevant field and possess hands-on experience with bonding processes and semiconductor equipment. The company offers a supportive culture encouraging personal and professional growth.

Qualifications

• M.S. or Ph.D. in Materials Science, Electrical Engineering, Applied Physics, or a related STEM discipline.
• In-depth knowledge and hands-on experience in die-to-wafer or wafer-to-wafer bonding.
• Proficiency in statistical analysis and process control (DOE, SPC, JMP).
• Strong problem-solving skills.

Responsibilities

• Develop die‑to‑wafer hybrid bonding processes.
• Integrate D2W bonding with adjacent process modules.
• Design and execute DOE‑driven experiments.
• Own process optimization and drive continuous improvement.

Job description

About the Role

As a Process Engineer at Applied Materials, you will play a critical role in designing and optimizing manufacturing processes for display and semiconductor manufacturing technologies. You will collect and analyze data, perform hardware characterization, troubleshoot engineering issues, measure film properties, generate technical documentation, and engage with customers to resolve concerns. Process Engineers collaborate with vendors and suppliers and become familiar with implementing new technologies and products.

Location & Compensation

• Location: Santa Clara, CA
• Salary: $147,000.00 - $202,500.00
• Travel: 10% of the time; relocation eligible

Key Responsibilities

• Develop die‑to‑wafer hybrid bonding processes, including surface preparation and plasma activation, high‑accuracy die placement and alignment, post‑bond characterization and process evaluation.
• Integrate D2W bonding with adjacent process modules such as dicing and die preparation, die thinning, inter‑die gap fill, and planarization.
• Design and execute DOE‑driven experiments to understand process limits, sensitivities, and trade‑offs.
• Own process optimization, perform failure analysis and characterization, and drive continuous engineering improvement.

Qualifications

• M.S. or Ph.D. in Materials Science, Electrical Engineering, Applied Physics, or a related STEM discipline.
• In‑depth knowledge and hands‑on experience in die‑to‑wafer or wafer‑to‑wafer bonding, thin‑die handling and alignment‑critical processes, direct process engineer experience on mainstream semiconductor equipment (plasma, wet clean, overlay/alignment), 2.5D/3D integration.
• Strong understanding of bond interface physics, alignment and overlay fundamentals, mechanical behavior of thin and fragile dies.
• Proficiency in statistical analysis and process control (DOE, SPC, JMP).
• Self‑starter with strong problem‑solving skills; able to work both independently and collaboratively with minimal supervision.
• Strong communication and interpersonal skills, with the ability to collaborate effectively across multidisciplinary teams.

Benefits

You’ll benefit from a supportive work culture that encourages learning, development, and career growth. The company offers programs and support encouraging personal and professional growth and well‑being.

Employment Type

Full time; Assignee / Regular. Travel: 10% of the time. Relocation eligible.

Equal Opportunity Statement

Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.