Process Engineer II - Office of the CTO

Applied Materials

Santa Clara (CA)

On-site

USD 100,000 - 136,500

Full time

14 days+
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Benefits offered by this job

Comprehensive benefits package
Participation in bonus and stock award program

Job summary

Applied Materials is seeking a Process Engineer in Santa Clara, CA to develop and optimize advanced packaging processes. You will perform hands-on experiments, data analysis, and collaborate with teams to enhance technologies in semiconductor packaging.

The ideal candidate should have expertise in lithography and semiconductor fabrication. This full-time position offers the chance to work in a supportive culture committed to growth and innovation.

Qualifications

  • Hands-on semiconductor packaging and/or semiconductor fabrication experiences.
  • Preferred experience with lithography process engineering.

Responsibilities

  • Conduct lab-based experiments to improve advanced packaging processes.
  • Develop and sustain photolithography processes.
  • Design, collect data, analyze, and compile reports.

Skills

Hands-on semiconductor packaging
Expertise on lithography
Wet chemical etch/clean
Data analysis

Job description

Company Overview

Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting‑edge equipment that helps our customers manufacture display and semiconductor chips – the brains of devices we use every day.

What We Offer

Salary: $100,000.00 – $136,500.00

Location: Santa Clara, CA

You’ll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers.

At Applied Materials, we care about the health and wellbeing of our employees. We’re committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go.

Role Summary

The Process Engineer will be responsible for developing, optimizing, and maintaining laboratory‑scale processes related to semiconductor advanced packaging. This role involves hands‑on experimentation, data analysis, and collaboration with cross‑functional teams to support advanced packaging technologies such as wafer‑level packaging, flip‑chip, and 3D integration. A background in lithography process engineering is preferred.

Key Responsibilities
  • Conduct lab‑based experiments to evaluate and improve advanced packaging processes.
  • Develop, optimize, and sustain photolithography processes for advanced packaging.
  • Design, collect data, analyze, and compile reports on a variety of difficult process engineering experiments, within safety guidelines.
  • Perform hardware characterization on a variety of difficult systems, within safety guidelines.
  • Troubleshoot a variety of complex problems, perform Root Cause Analysis, and resolve process engineering issues.
  • Generate internal and external documentation for products, presentations, and technical reports.
  • Interact with customers to resolve process engineering issues or problems with limited supervision.
  • Measure film properties and interpret data.
  • Identify, select, and work with vendors and suppliers with limited supervision.
  • Implement new technology, products, and analytical instrumentation.
Functional Knowledge
  • Demonstrates conceptual and practical expertise in own discipline and basic knowledge of related disciplines.
Business Expertise
  • Has knowledge of best practices and how own area integrates with others; is aware of the competition and the factors that differentiate them in the market.
Leadership
  • Acts as a resource for colleagues with less experience; may lead small projects with manageable risks and resource requirements.
Problem Solving
  • Solves complex problems; takes a new perspective on existing solutions; exercises judgment based on the analysis of multiple sources of information.
Impact
  • Impacts a range of customer, operational, project or service activities within own team and other related teams; works within broad guidelines and policies.
Interpersonal Skills
  • Explains difficult or sensitive information; works to build consensus.
Requirements
  • Hands‑on semiconductor packaging and/or semiconductor fabrication experiences in academia and/or industry.
  • Expertise on lithography, wet chemical etch/clean, dry film lamination is preferred.
Location & Employment

Santa Clara, CA; on‑site full time.

Travel: Yes, 20% of the time.

Relocation Eligible: Yes.

Benefits Summary

In addition to a comprehensive benefits package, candidates may be eligible for other forms of compensation such as participation in a bonus and a stock award program, as applicable.

Equal Opportunity Employer

Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law. Applied endeavors to make our careers site accessible to all users. If you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e‑mail at Accommodations_Program@amat.com.

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