Principal Formal Verification Engineer – Silicon
Microsoft
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Job summary
Microsoft is hiring a Principal Design Verification Engineer - Formal for the Silicon Engineering team. Location: Raleigh, NC, US | Austin, TX, US | Hillsboro, OR, US. Work arrangement: onsite.
The role focuses on formal verification methodologies to ensure chip designs meet stringent specs, with emphasis onDV techniques, property checking, and coverage-driven verification. You will collaborate with cross‑functional teams including design, software, and validation to drive robust silicon
Job description
Microsoft is hiring a Principal Design Verification Engineer - Formal for the Silicon Engineering team. Location: Raleigh, NC, US | Austin, TX, US | Hillsboro, OR, US. Work arrangement: onsite.
The role focuses on formal verification methodologies to ensure chip designs meet stringent specs, with emphasis onDV techniques, property checking, and coverage-driven verification. You will collaborate with cross‑functional teams including design, software, and validation to drive robust silicon
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