Principal Engineer - PCIe/CXL Emulation & Verification

Cadence Design Systems

San Jose (CA)

On-site

USD 154,000 - 286,000

Full time

14 days+
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Job summary

Cadence Design Systems is seeking an experienced engineer to advance PCIe AVIP and Virtual Bridge offerings. You will design protocol features, build BFMs and transactors, and ensure scalable verification across emulation platforms.

You will work with cross-functional teams, debug complex issues, and support customer deployments, contributing to high-performance compute, AI, and networking solutions.

Qualifications

  • BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience.
  • Strong fundamentals in digital design, computer architecture, and system-level verification.
  • Experience with hardware description languages (SystemVerilog/Verilog) and/or C/C++.
  • Understanding of PCIe, CXL, NVMe interconnects; emulation/acceleration flows is a strong plus.
  • Good debugging skills using waveforms, logs, and protocol analyzers.

Responsibilities

  • Designing and implementing protocol functionality in PCIe AVIP and/or Virtual Bridge components.
  • Developing and debugging BFMs, transactors, and associated software interfaces.
  • Ensuring correctness, performance, and scalability in emulation and acceleration flows.
  • Collaborating with cross-functional teams and supporting feature bring-up.
  • Participating in regression and release activities and resolving customer issues.

Skills

Digital design
Computer architecture
System-level verification
SystemVerilog
C/C++

Education

Bachelor's degree in Electrical Engineering or related field
Master's degree or PhD in related field

Tools

SystemVerilog
Verilog
C/C++

Job description

Cadence Design Systems is seeking an experienced engineer to advance PCIe AVIP and Virtual Bridge offerings. You will design protocol features, build BFMs and transactors, and ensure scalable verification across emulation platforms.

You will work with cross-functional teams, debug complex issues, and support customer deployments, contributing to high-performance compute, AI, and networking solutions.

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