Senior High-Speed Hardware Engineer: PCIe & Serdes Validation

Veriipro; San Jose (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Veriipro is seeking a seasoned Hardware Engineer in the San Jose area to lead the design, validation, and bring-up of high-performance networking hardware. You will work across firmware, software, mechanical, and manufacturing teams to ensure robust, scalable products.

The role requires deep hands-on experience with PCIe Gen5, SERDES, DDR5, NVMe interfaces, and power architectures, along with Cadence tools for schematic capture and PCB design.

Qualifications

• 10–15 years of overall hardware engineering experience, 8+ years in complex hardware, networking preferred.
• Hands-on experience in high-speed hardware design and failure analysis.
• Experience with PCIe Gen5 and SERDES (>25G).

Responsibilities

• Design and develop complex hardware solutions for networking and other high-performance products.
• Perform schematic design, component selection, hardware architecture, and design reviews.
• Work with high-speed interfaces including SERDES (>25G), PCIe Gen5+, and related protocols.
• Design and integrate low-speed interfaces such as SPI, I2C, MDIO, SMBus, and related management interfaces.
• Work with optical interfaces including QSFP, QSFP-DD, and OSFP.
• Design and validate DDR5 and NVMe PCIe-based interfaces.
• Develop and analyze complex power supply architectures for networking products.
• Use Cadence toolchain for schematic capture, PCB/CAD design, and related hardware development activities.
• Perform board bring-up, hardware debugging, validation, and qualification.
• Conduct detailed hardware failure analysis, root-cause analysis, and corrective actions.
• Develop and execute hardware validation and qualification plans based on functional specifications.
• Collaborate with firmware, software, mechanical, thermal, manufacturing, and system engineering teams.
• Support prototype development, design verification, manufacturing, and production issues.
• Document design decisions, test results, failures, root causes, and corrective actions.

Skills

High-speed design

SERDES >25G

PCIe Gen5

DDR5

NVMe PCIe

Power architecture

Cadence tools

Board bring-up

Failure analysis

Hardware validation

Networking systems

Troubleshooting

Schematic design

Tools

Cadence CAD tools

Job description

Veriipro is seeking a seasoned Hardware Engineer in the San Jose area to lead the design, validation, and bring-up of high-performance networking hardware. You will work across firmware, software, mechanical, and manufacturing teams to ensure robust, scalable products.

The role requires deep hands-on experience with PCIe Gen5, SERDES, DDR5, NVMe interfaces, and power architectures, along with Cadence tools for schematic capture and PCB design.