Principal Engineer - ASIC Verification & UVM Expert

NXP Semiconductors; Chandler (AZ); On-site; USD 148,000 - 200,000; Full time

Job summary

NXP Semiconductors in Chandler, AZ seeks a semiconductor engineering professional to drive design, development, and verification for advanced mixed-signal devices. The role centers on digital verification and the creation of robust UVM environments.

Responsibilities include developing drivers, monitors, checkers, and assertions; running top-level simulations; studying device specs for full coverage; and coordinating regression testing, bug reporting, and verification reviews with design leaders.

Qualifications

• Bachelor’s degree required in Electrical Engineering, Electronic Engineering, or Computer Engineering.
• Five (5) years of progressive post-baccalaureate experience in engineering roles such as Engineer, Design Engineer, or Verification Engineer.

Responsibilities

• Perform semiconductor engineering design, development, and testing for firm products and devices.
• Participate in digital functional verification of mixed-signal circuit designs.
• Develop the UVM simulation environment (drivers, monitors, checkers, and assertions).
• Bridge with mixed signal verification and top-level simulations per verification plan.
• Study device under test specifications to ensure 100% coverage prior tape-out.
• Create and maintain regression test suites, report bugs, and drive fixes and reviews.

Skills

ARM multi-processor

Serial protocols

SOC testbench

SystemVerilog

UVM verification

GLS simulations

ASIC verification

Regression management

C-based testing

SPI interface

Education

Bachelors in Electrical/Electrical Engineering / Computer Engineering

Job description

NXP Semiconductors in Chandler, AZ seeks a semiconductor engineering professional to drive design, development, and verification for advanced mixed-signal devices. The role centers on digital verification and the creation of robust UVM environments.

Responsibilities include developing drivers, monitors, checkers, and assertions; running top-level simulations; studying device specs for full coverage; and coordinating regression testing, bug reporting, and verification reviews with design leaders.