Principal DRAM Physical Design Engineer - PPA Signoff

1000 Micron Technology, Inc.

Boise (ID)

On-site

USD 180,000 - 240,000

Full time

14 days+

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Benefits offered by this job

Medical plan
Dental plan
Vision plan
Paid time off
Benefits guide

Job summary

Micron Technology is seeking a Principal Physical Design Engineer to provide technical leadership for advanced DRAM digital design implementation and signoff methodologies. This role will drive physical design from RTL through tapeout with a strong focus on timing closure, power integrity, EMIR analysis, and design reliability.

The engineer will collaborate with architecture, RTL, implementation, CAD and technology teams to develop scalable physical design solutions that meet power, performance,

Qualifications

  • Master's degree in Electrical Engineering (or equivalent) with 8+ years of experience, or Bachelor's degree with 10+ years of experience in ASIC physical design.
  • Strong expertise in physical design implementation flows including floorplanning, place and route, clock tree synthesis, timing closure, and design signoff.
  • Hands-on experience with STA, signal integrity, power integrity, physical verification, and advanced process technologies.
  • Proficiency with industry-standard PD design and signoff tools such as ICC2, Fusion Compiler, PrimeTime, PrimePower, and RedHawk (or equivalent).
  • Strong scripting and automation skills using Python, Tcl, or similar languages.

Responsibilities

  • Lead physical design implementation of complex DRAM digital designs, including floorplanning, place and route, clock tree synthesis, timing closure, and tapeout activities.
  • Drive power integrity strategies and signoff methodologies, including PDN planning, IR drop analysis, electromigration (EM) verification, and EMIR signoff.
  • Collaborate with multi-functional teams to resolve timing, congestion, power, signal integrity, and reliability challenges at both block and full-chip levels.
  • Develop and deploy methodology improvements, automation solutions, and guidelines to improve build quality, efficiency, and scalability.
  • Mentor engineers and provide technical leadership while influencing future memory products through innovation in physical design and signoff methodologies.

Skills

Project leadership
Timing closure
Power integrity
EMIR analysis
Python scripting
Tcl scripting
Multi-team collaboration
AI-assisted tooling

Education

Master's degree in Electrical Engineering
Bachelor's degree in Electrical Engineering

Tools

ICC2
Fusion Compiler
PrimeTime
PrimePower
RedHawk

Job description

Micron Technology is seeking a Principal Physical Design Engineer to provide technical leadership for advanced DRAM digital design implementation and signoff methodologies. This role will drive physical design from RTL through tapeout with a strong focus on timing closure, power integrity, EMIR analysis, and design reliability.

The engineer will collaborate with architecture, RTL, implementation, CAD and technology teams to develop scalable physical design solutions that meet power, performance,

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