Principal Analog & Mixed-Signal Design Lead

Hardware FYI; Irvine, Northern (CA, KY); Hybrid; USD 170.000 - 210.000; Vollzeit

Benefits dieser Stelle

Discretionary bonus

Benefits

Zusammenfassung

Astera Labs is redefining connectivity for rack-scale AI infrastructure. As a Principal Analog Design Engineer, you will architect high-speed analog/mixed-signal circuits and own silicon bring-up from concept to validation.

You will shape the performance, power, and reliability of SERDES, PHY, and I/O blocks used in data centers. You will mentor engineers, set design standards, and collaborate across digital, physical design, and systems teams to deliver full-chip solutions.

Qualifikationen

• MS or PhD in Electrical Engineering or a related field.
• 8+ years of experience in analog and mixed-signal IC design.
• Proven track record designing high-speed analog circuits (PLLs, SerDes front-ends, data converters, references, regulators).
• Strong understanding of physical-layer design, signal integrity, and high-speed I/O.

Aufgaben

• Architect and design high-speed analog and mixed-signal circuits including PLLs, LDOs, references, SerDes building blocks, ADCs/DACs, and clocking.
• Drive design from specification through schematic, layout supervision, and verification across PVT corners.
• Lead silicon bring-up, characterization, and debug with validation and product engineering to root-cause issues.

Kenntnisse

Analog design

Mixed-signal design

High-speed I/O

Leadership/mentoring

Ausbildung

MS or PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

Jobbeschreibung

Astera Labs is redefining connectivity for rack-scale AI infrastructure. As a Principal Analog Design Engineer, you will architect high-speed analog/mixed-signal circuits and own silicon bring-up from concept to validation.

You will shape the performance, power, and reliability of SERDES, PHY, and I/O blocks used in data centers. You will mentor engineers, set design standards, and collaborate across digital, physical design, and systems teams to deliver full-chip solutions.