Principal AI Accelerator SoC Physical Design Lead

Acceler8 Talent; San Francisco (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

Acceler8 Talent seeks a Principal Physical Design Engineer to lead the complete physical implementation of high-performance AI accelerator blocks from floorplanning to tapeout. You will collaborate with architects, RTL engineers, and software teams to optimize for performance, power, and area.

You will leverage AI-assisted methodologies and work with EDA vendors and foundries to deliver production-ready silicon, including CTS, timing closure, and signoff across advanced nodes.

Qualifications

• 8+ years of experience in physical design for complex, high-performance ASICs at advanced process nodes (7nm or below).
• Deep expertise across the full implementation flow, including synthesis, place & route, CTS, timing closure, physical verification, and signoff.
• Strong hands-on experience with leading implementation tools such as Cadence Innovus, Synopsys Fusion Compiler, or comparable platforms.
• Experience with industry-standard signoff tools including PrimeTime, Tempus, or equivalent.
• Proven success working cross-functionally with architects, RTL engineers, EDA vendors, and foundries to deliver complex silicon.
• Bonus experience with advanced packaging technologies (2.5D/3D, CoWoS), IR/EM analysis, thermal optimization, signal integrity, or DFT-aware implementation.

Responsibilities

• Own the complete physical design flow for one or more major SoC blocks, from floorplanning through final signoff.
• Leverage and help develop AI-assisted implementation methodologies to improve design productivity and accelerate tapeout schedules.
• Drive place and route, clock tree synthesis, timing closure, power optimization, and physical verification.
• Partner closely with architecture, RTL, verification, and software teams to optimize implementation for performance, power, and area.
• Collaborate with EDA vendors and foundry partners to resolve implementation challenges and deliver production-ready silicon.

Skills

Physical design leadership

ASIC design experience

Cross-functional collaboration

Tools

Cadence Innovus

Synopsys Fusion Compiler

PrimeTime

Tempus

Job description

Acceler8 Talent seeks a Principal Physical Design Engineer to lead the complete physical implementation of high-performance AI accelerator blocks from floorplanning to tapeout. You will collaborate with architects, RTL engineers, and software teams to optimize for performance, power, and area.

You will leverage AI-assisted methodologies and work with EDA vendors and foundries to deliver production-ready silicon, including CTS, timing closure, and signoff across advanced nodes.