AI Accelerator Physical Design Engineer

OpenAI; San Francisco (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

OpenAI's Hardware organization is seeking a Physical Design Engineer to deliver power, performance and area-optimized datapath and interconnect solutions for AI accelerators. You will work with RTL designers to define physical design strategies and create tools and flows to increase team productivity.

You will influence silicon performance, cost efficiency and execution velocity, owning floorplanning, signoff and collaboration with EDA vendors and ASIC partners.

Qualifications

• BS with 4+ years or MS with 2+ years or PhD with 0-1 year of relevant experience in physical design
• Proven track record taping out complex silicon designs
• Hands-on experience with block physical implementation and PPA convergence
• Strong coding experience with Python, Bazel and TCL
• Strong understanding of microarchitecture, RTL and timing closure
• Familiar with physical synthesis, PNR, LEC and power estimation

Responsibilities

• Develop and own tools, flows and methodologies for physical implementation
• Own floorplan blocks from floorplanning to final signoff
• Collaborate with RTL designers for optimal block implementation
• Analyze and optimize design for timing, power and area with EDA partners

Skills

Physical design

PPA convergence

Python

Bazel

TCL

RTL/DFT understanding

Timing optimization

Education

BS/MS/PhD in relevant field

Tools

Python

Bazel

TCL

EDA tools

Job description

OpenAI's Hardware organization is seeking a Physical Design Engineer to deliver power, performance and area-optimized datapath and interconnect solutions for AI accelerators. You will work with RTL designers to define physical design strategies and create tools and flows to increase team productivity.

You will influence silicon performance, cost efficiency and execution velocity, owning floorplanning, signoff and collaboration with EDA vendors and ASIC partners.