Power Modeling Engineer – CPU/IP for RISC-V

SiFive, Inc.; Santa Clara (CA); On-site; USD 179,000 - 219,000; Full time

Benefits offered by this job

Equity

Healthcare benefits

Retirement plan

Job summary

SiFive is seeking a researcher to develop power models for RISC-V based CPUs. You will correlate power estimates with RTL and silicon while exploring architecture options to optimize performance and power.

The role blends hardware and software engineering, requiring strong problem-solving and a fast learner. You will work on models that help predict the impact of design changes, with opportunities for equity and competitive benefits.

Qualifications

• MS or PhD in Computer Science or Computer Architecture.
• 3+ years of experience in power analysis and modeling.
• Experience with power impacts at architecture, logic design, and circuit levels.
• Knowledge of high-performance out-of-order CPU designs.
• Experience with ASIC power analysis and optimization.
• Hands-on expertise with HW or SW development is a strong plus.
• Competency in software engineering best practices for large OO codebases.
• Self-starter with fast learning and strong problem-solving.

Responsibilities

• Develop power models for architecture exploration and development.
• Correlate power models with RTL and Silicon.
• Develop innovative methods to predict power of design changes.

Skills

Power modeling

Architecture exploration

Problem solving

Self-starter

Fast learner

Education

MS or PhD in Computer Science / Computer Architecture

Tools

RTL

FPGA flows

ASIC power analysis tools

Job description

SiFive is seeking a researcher to develop power models for RISC-V based CPUs. You will correlate power estimates with RTL and silicon while exploring architecture options to optimize performance and power.

The role blends hardware and software engineering, requiring strong problem-solving and a fast learner. You will work on models that help predict the impact of design changes, with opportunities for equity and competitive benefits.