Power Model Engineer for High-Performance CPU Design

SiFive; Santa Clara (CA); On-site; USD 179,000 - 219,000; Full time

Job summary

SiFive is seeking a power modeling engineer to develop power models for our RISC-V processors. You will collaborate with architecture and RTL teams to predict power across design changes and correlate models with silicon.

The role requires a PhD or MS in CS/CPU architecture and 3+ years in power analysis, with hands-on experience in HW or SW development. Strong problem-solving and OO code skills are a plus.

Qualifications

• MS or PhD in Computer Science / Computer Architecture.
• 3+ years of experience in power analysis and modeling.
• Experience with power impacts at architecture, logic design, and circuit levels.
• Good knowledge of high performance out-of-order CPU designs.
• Experience with ASIC power analysis and optimization.
• Hands-on expertise with either HW development or SW development is a strong plus.
• Competency in maintaining very large object oriented code bases.

Responsibilities

• Develop power models for architecture exploration and development.
• Correlate power models with RTL and Silicon.
• Develop innovative methods to predict power of design changes.

Skills

Power analysis

Power modeling

CPU architecture knowledge

HW/SW development experience

OO code base maintenance

Education

MS or PhD in Computer Science / Computer Architecture

Tools

RTL/implementation flows

verification/validation

FPGA flows

Job description

SiFive is seeking a power modeling engineer to develop power models for our RISC-V processors. You will collaborate with architecture and RTL teams to predict power across design changes and correlate models with silicon.

The role requires a PhD or MS in CS/CPU architecture and 3+ years in power analysis, with hands-on experience in HW or SW development. Strong problem-solving and OO code skills are a plus.