Power Management Verification Engineer - CPU/SoC

Socket.dev; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Apple in Austin, TX is seeking a Processor Power Management Verification Engineer to join the center of a chip design effort with broad collaboration across architecture and RTL teams.

You will verify power management and clock control logic, develop tests in SystemVerilog, assemble test plans, and drive coverage and silicon bring-up in emulation and FPGA environments. You will mentor junior engineers and contribute to robust verification methodologies.

Qualifications

• BS is required.
• Experience with digital logic, microprocessor and power management architecture.
• Knowledge of Verilog/SystemVerilog based testbenches, transactors and checkers.
• Programming skills in Perl or Python.

Responsibilities

• Verify the functionality of Power Management and Clock Control logic.
• Develop and execute test plans for power management and clock control.
• Write tests in Assembly, Scripts, SystemVerilog, or vectors for simulating environments.
• Identify root causes and propose design fixes.
• Collaborate with silicon bring-up on emulation/FPGA tests and debugging.
• Develop coverage monitors and ensure test coverage of plans.
• Create checkers or transactors and apply assertions and formal verification.

Skills

Digital logic

Micro-processor architecture

Power management architecture

Verilog/SystemVerilog testbenches

Transactors / checkers

Perl

Python

UVM

Education

BS in Electrical/Computer Engineering

Master’s degree preferred

Job description

Apple in Austin, TX is seeking a Processor Power Management Verification Engineer to join the center of a chip design effort with broad collaboration across architecture and RTL teams.

You will verify power management and clock control logic, develop tests in SystemVerilog, assemble test plans, and drive coverage and silicon bring-up in emulation and FPGA environments. You will mentor junior engineers and contribute to robust verification methodologies.