CPU Debug and Power Management Verification Engineer

Apple Inc.; Beaverton (OR); On-site; USD 140,000 - 210,000; Full time

Job summary

Apple Inc. in Beaverton, Oregon, is seeking a highly motivated CPU Debug and Power Management Verification Engineer to join the silicon engineering team.

You will verify Power Management, Clock Control, Debug Infrastructure, and related features across pre-silicon and post-silicon stages. Collaborate with architecture and RTL designers, develop test plans, and write tests in Assembly, SystemVerilog, SVA, C++, and scripting languages to validate functionality in simulation, emulation, and FPGA

Qualifications

• BS degree in Electrical Engineering or related field is required.
• 10+ years of relevant industry experience.
• Programming skills in Perl/Python or SystemVerilog are required.

Responsibilities

• Verify Power Management, clock control, and debug logic across pre-silicon and post-silicon stages.
• Collaborate with architecture and RTL designers to ensure functional correctness of CPU features.
• Develop and execute test plans and schedules.

Skills

Perl/Python

SystemVerilog

Assembly language

Education

Bachelor's degree in Electrical Engineering or related field

Tools

UVM

UPF

Job description

CPU Debug and Power Management Verification Engineer

In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

Description

We are seeking a highly motivated Design Verification Engineer to join our silicon engineering team focused on the auxiliary features of a high-performance ARM-based CPU. These features include Power Management, Clock Control, Debug Infrastructure, Resets, and Special-Purpose Registers—spanning both ARM-standard capabilities and Apple-specific innovations.

• You will work across the entire product lifecycle, from pre-silicon test planning to supporting post-silicon bring-up and debug when needed. This role is highly cross-functional, bridging CPU and SoC teams, and is critical to delivering robust, low-power, high-performance CPU designs.
• Work closely with architecture and RTL designers on verifying the functionality correctness of CPU Power Management, clock control, and debug logic.
• Develop and execute test plans and schedules.
• Write and debug tests in Assembly, SystemVerilog, SVA, C++, and scripting languages to validate functionality in simulation, emulation, and FPGA environments.
• Build and maintain verification infrastructure, including checkers, transactors, and coverage monitors.
• Analyze functional coverage to ensure test plan completeness.
• Identify, root-cause, and document design issues and collaborate with RTL teams to drive fixes.
• Support SoC-level debug for clock and power integration issues.
• Work with silicon bring-up teams to develop tests and debug issues across emulation, FPGA, and silicon, and contribute to post-silicon debug using waveform and trace tools to diagnose complex system issues.

Minimum Qualifications

• Minimum BS and 10+ years of relevant industry experience
• Programming skills in Perl/Python or SystemVerilog

Preferred Qualifications

• Experience in processor or power management architecture and verification
• Experience with system fabric protocols such as AXI
• In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches
• Experience in System Verilog assertions or silicon bringup or UPF and low power simulation
• Experience in processor debug features including hardware trace is a plus
• Experience with advanced verification techniques such as formal verification is a plus
• Advanced programming skills such as object orientated programming or CPU assembly language is a plus
• Should be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification effort
• Be able to create and follow detailed work schedules and work independently on the verification efforts for a block/area of the design

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

Apple accepts applications to this posting on an ongoing basis.