Power Architect - DPU & Infrastructure Silicon

Meta; Austin (TX); Sur place; USD 178 000 - 250 000; Plein temps

Résumé du poste

Meta's Infrastructure Silicon organization seeks an experienced Power Architect to drive power modeling, analysis, and architectural power optimization for DPUs and SmartNIC/IPU designs. The role influences architecture from early path-finding to RTL/gate-level power analysis, ensuring best-in-class performance-per-watt on data center workloads.

You will own power budgets, collaborate with design, firmware, and software teams, and correlate pre-silicon projections with post-silicon measurements

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, or equivalent practical experience.
• Experience analyzing workload and power-relevant behaviors.
• Experience building system-level power models and tracking from early estimates through RTL/gate-level power.
• Experience defining or evaluating architectural power-saving features (DVFS, power gating, clock gating).
• Understanding of SoC pipelines and data movement impact on power vs. performance.
• Proficiency in programming languages for model development and automation (Python, C/C++, SystemC).
• Experience driving independent analysis and influencing architectural direction through data.

Responsabilités

• Analyze real-world DPU software use cases to identify hardware power bottlenecks and power-relevant behaviors.
• Build and maintain workload-driven power models and power rollups for DPU architectures, tracking accuracy from early estimates to RTL/gate-level power.
• Quantify architectural trade-offs with respect to PPA and energy-per-transaction to guide design decisions.
• Define and drive structural power-saving features: DVFS, AVS, power gating, clock gating, activity throttling, workload-aware policies.
• Analyze SoC pipelines and data movement paths to optimize power-versus-performance trade-offs.
• Own power budgets and provide power-delivery and thermal inputs with cross-functional teams.
• Correlate pre-silicon projections with post-silicon measurements to improve methodology.

Connaissances

Workload analysis

Power modeling

System-level modeling

Data-driven decision making

Power optimization

Programming experience

Formation

Bachelor's degree in CS/CE or equivalent

PhD (preferred)

Outils

Python

C/C++

SystemC

FSDB/SAIF

Power estimation tools (PrimePower/PTPX, Joules, PowerArtist)

Description du poste

Meta's Infrastructure Silicon organization seeks an experienced Power Architect to drive power modeling, analysis, and architectural power optimization for DPUs and SmartNIC/IPU designs. The role influences architecture from early path-finding to RTL/gate-level power analysis, ensuring best-in-class performance-per-watt on data center workloads.

You will own power budgets, collaborate with design, firmware, and software teams, and correlate pre-silicon projections with post-silicon measurements