DPU Performance Architect, Infrastructure Silicon

Meta; Austin (TX); On-site; USD 140,000 - 210,000; Full time

Job summary

Meta's Infrastructure Silicon organization designs custom silicon that powers data center infrastructure—SmartNICs/IPUs/DPUs, AI accelerators, and networking ASICs. We seek an experienced Performance Architect to drive performance modeling, analysis, and validation of DPU architectures, influencing architecture decisions from early path-finding through RTL validation and silicon correlation.

The role demands deep experience in end-to-end performance analysis, workload characterization, and

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
• 8+ years of relevant industry experience in developing analytical/tool based models and performance analysis with focus on networking and storage architectures.
• Detailed understanding of DPU architectures: network virtualization, storage disaggregation, networking and storage protocols such as RoCE, NVMe, fabric architectures.
• Experience in workload analysis and characterisation, and abstracting key performance features into models for analysis.
• Proficiency in languages for model development (e.g. Python, C/C++, SystemC).

Responsibilities

• Analyze performance of current and future SmartNIC/IPU/DPU architectures with focus on end-to-end transaction flows, host-to-DPU offloading options, evaluation of SoC architectural options
• Quantify architectural/micro-architectural trade-offs wrt PPA to inform and guide design decisions
• Analyze and characterise DPU workloads to abstract key performance-relevant behaviours and incorporate into representative models and synthetic benchmarks
• Develop and enhance performance models, simulation tools, and methodologies to evaluate future DPU architectures
• Drive RTL performance validation, including development of comprehensive performance test plans, coverage criteria, and correlation of RTL results against architectural models
• Correlate pre-silicon performance projections with post-silicon measurements and drive methodology improvements based on findings

Skills

DPU performance modeling

Performance analysis

Workload analysis

Benchmarking methodologies

Communication with RTL

Education

Bachelor's degree in Computer Science/Engineering or equivalent

Tools

Python

C/C++

SystemC

Job description

Summary:

Meta's Infrastructure Silicon organization designs custom silicon that powers our data center infrastructure — SmartNICs/IPUs/DPUs, AI accelerators, and networking ASICs. We are seeking an experienced Performance Architect to drive performance modeling, analysis, and validation of our Data Processing Unit (DPU) architectures. In this role you will influence architecture and microarchitecture decisions from early path-finding through RTL validation and silicon correlation.

Required Skills:

DPU Performance Architect, Infrastructure Silicon Responsibilities:

1. Analyze performance of current and future SmartNIC/IPU/DPU architectures with focus on end-to-end transaction flows, host-to-DPU offloading options, evaluation of SoC architectural options




2. Quantify architectural/micro-architectural trade-offs wrt PPA to inform and guide design decisions




3. Analyze and characterise DPU workloads to abstract key performance-relevant behaviours and incorporate into representative models and synthetic benchmarks




4. Develop and enhance performance models, simulation tools, and methodologies to evaluate future DPU architectures




5. Drive RTL performance validation, including development of comprehensive performance test plans, coverage criteria, and correlation of RTL results against architectural models




6. Correlate pre-silicon performance projections with post-silicon measurements and drive methodology improvements based on findings

Minimum Qualifications:

Minimum Qualifications:

1. Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience




2. 8+ years of relevant industry experience in developing analytical/tool based models and performance analysis with focus on networking and storage architectures




3. Detailed understanding of DPU architectures: network virtualization, storage disaggregation, networking and storage protocols such as RoCE, NVMe, fabric architectures




4. Experience in workload analysis and characterisation, and abstracting key performance features into models for analysis




5. Proficiency in languages for model development (e.g. Python, C/C++, SystemC)




6. Experience with data centre workloads and benchmarking methodologies




7. Experience