Physical Design Engineer

Broadcom; Broomfield (CO); On-site; USD 144,000 - 230,000; Full time

Job summary

Broadcom is seeking an experienced design engineer in Colorado to push place-and-route and timing closure for complex ASIC/SoC designs. The role focuses on floor-planning, partitions, and clock-tree synthesis, with hands-on timing and ECO implementation to meet aggressive PPA targets.

Responsibilities include maintaining flow integrity across 7nm+ process nodes, driving tool use (Primetime, Innovus, ICC2) and collaborating in a global team to deliver Right-first time silicon.

Qualifications

• Primary expertise in place and route and/or timing (constraints, STA) can be considered for this position.
• Hands on experience with timing analysis and place and route tools for ASIC/ SoC Design is a must.
• Experience with formal verification, timing analysis and Eco implementation.
• Full chip tapeout experience based on 7nm and lower technologies is highly preferred.

Responsibilities

• Work on Design Implementation activities related to place and route and/ or timing closure – floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC).
• Drive tools and methodologies to achieve desired PPA metrics.
• Complete equivalence checks, STA, Timing closure and power optimization.
• Implement timing and functional ECOs.
• Apply Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous criteria for achieving Right-first time silicon.

Skills

Place & route

Timing closure

Design implementation

Floor-planning

Communication skills

Education

BS in Electrical Engineering/ Computer Engineering or related field

MS in Electrical Engineering/ Computer Engineering or related field

Tools

Primetime

ICC2

Innovus

Caliber

LEC

PrimeTime

Job description

USA-CA San Jose Innovation Drive

USA-Allentown-1110 American Parkway NE

USA-Colorado-Fort Collins-4380 Ziegler Road

USA-CO Broomfield

Full time

R027531

Job Description:

Responsibilities Include:

• Work on Design Implementation activities related to place and route and/ or timing closure – floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC).
• Drive tools and methodologies to achieve desired PPA metrics.
• Complete equivalence checks, STA, Timing closure and power optimization.
• Implement timing and functional ECOs.
• Apply Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous criteria for achieving Right-first time silicon.

Qualifications Desired:

• Primary expertise in place and route and/or timing (constraints, STA) can be considered for this position.
• Proficient in design implementation activities both at block and SoC level.
• Well experienced in floor-planning, partitioning, placement, clock tree synthesis, route and physical verification and/ or constraints development, constraints validation, timing analysis and closure.
• Experience with formal verification, timing analysis and Eco implementation.
• Experience with tools such as Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime etc is highly desirable.
• Full chip tapeout experience based on 7nm and lower technologies is highly preferred.
• Hands on experience with timing analysis and place and route tools for ASIC/ SoC Design is a must.

Additional Requirements:

• Good problem solver.
• Self starter who can work independently.
• Experienced in working in a global team and dynamic environment.
• Possess ability to learn and adapt to new tools and methodologies on the fly.
• Excellent communication skills.

Education required:

• BS in Electrical Engineering/ Computer Engineering or related field and 12+ years of related experience; or an MS in Electrical Engineering/ Computer Engineering or related field and 10+ years of related experience.

Compensation and Benefits

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.

We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.

We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Welcome! Thank you for your interest in Broadcom!

We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

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