Physical Design Engineer

Broadcom; Allentown (Lehigh County); On-site; USD 144,000 - 230,000; Full time

Benefits offered by this job

Discretionary annual bonus

401(k) with company match

Employee Stock Purchase Program (ESPP)

Medical, dental, vision

Job summary

Broadcom is seeking a senior design implementation engineer in the United States to drive place, route and timing closure for complex ASICs/SoCs. You will execute floor-planning, partitioning, placement, clock tree synthesis, routing and timing analysis within Broadcom's established flow.

Candidates should have hands-on experience with timing analysis, ECOs, and physical verification, and be proficient with industry tools (PrimeTime, ICC2, Innovus).

Qualifications

• BS or MS with 12+ / 10+ years of related experience respectively.
• Expertise in place and route, timing constraints and STA.
• Experience with full chip tapeout in 7nm or smaller.

Responsibilities

• Perform place, route, timing closure and physical verification.
• Drive tools and methodologies to hit PPA targets.
• Run equivalence checks, STA, timing closure and power optimization.
• Implement timing and functional ECOs.
• Follow Broadcom design flow for right-first-time silicon.

Skills

Place & route

Timing analysis

Block/SoC design impl

Problem solving

Global team work

Education

BS in Electrical/Computer Engineering or related

MS in Electrical/Computer Engineering or related

Tools

PrimeTime

ICC2

Innovus

Caliber

LVS/DRC tools

Job description

USA-CA San Jose Innovation Drive

USA-Allentown-1110 American Parkway NE

USA-Colorado-Fort Collins-4380 Ziegler Road

USA-CO Broomfield

Full time

R027531

Job Description:

Responsibilities Include:

• Work on Design Implementation activities related to place and route and/ or timing closure – floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC).
• Drive tools and methodologies to achieve desired PPA metrics.
• Complete equivalence checks, STA, Timing closure and power optimization.
• Implement timing and functional ECOs.
• Apply Broadcom's proven design methodology and milestone flow to meet Broadcom's rigorous criteria for achieving Right-first time silicon.

Qualifications Desired:

• Primary expertise in place and route and/or timing (constraints, STA) can be considered for this position.
• Proficient in design implementation activities both at block and SoC level.
• Well experienced in floor-planning, partitioning, placement, clock tree synthesis, route and physical verification and/ or constraints development, constraints validation, timing analysis and closure.
• Experience with formal verification, timing analysis and Eco implementation.
• Experience with tools such as Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime etc is highly desirable.
• Full chip tapeout experience based on 7nm and lower technologies is highly preferred.
• Hands on experience with timing analysis and place and route tools for ASIC/ SoC Design is a must.

Additional Requirements:

• Good problem solver.
• Self starter who can work independently.
• Experienced in working in a global team and dynamic environment.
• Possess ability to learn and adapt to new tools and methodologies on the fly.
• Excellent communication skills.

Education required:

• BS in Electrical Engineering/ Computer Engineering or related field and 12+ years of related experience; or an MS in Electrical Engineering/ Computer Engineering or related field and 10+ years of related experience.

Compensation and Benefits

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.

We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.

We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Welcome! Thank you for your interest in Broadcom!

We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

For more information please visit our video library (http://www.broadcom.com/videos) and check out our Connected by Broadcom (https://www.broadcom.com/support/resources/video-webinar-library?channel=5c9658f7c1d34eca91c6cc16178e5b1b&video=7d72b04ea50046a394e682fab640ce20) series.

Follow us on Linked In Broadcom Inc (https://www.linkedin.com/company/broadcom) .