Packaging Engineer | 12-Month Career Accelerator Program

Texas Instruments; Santa Clara (CA); On-site; USD 95,000 - 110,000; Full time

Job summary

Texas Instruments in Santa Clara, CA invites new graduates to join a 12-month Packaging Engineer Development program as part of the TMG Development program, with hands-on training to accelerate ramp into TI and long-term career success.

You will partner across businesses to design and develop internal and external semiconductor packaging solutions, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages, while supporting qualification, testability and reliability goals in a

Qualifications

• Recent graduates entering a 12-month CAP program.

Responsibilities

• Partner with the businesses to design and develop internal and external packaging solutions, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages.
• Participate in cross-functional teams to support product qualification, production, reliability and yield requirements, design testability and test coverage.
• Direct design-of-experiments and collaborate with material suppliers to improve reliability and performance of advanced packaging.
• Conduct electrical, mechanical and thermal modeling to understand silicon-to-package interaction and establish design rules.

Job description

Texas Instruments in Santa Clara, CA invites new graduates to join a 12-month Packaging Engineer Development program as part of the TMG Development program, with hands-on training to accelerate ramp into TI and long-term career success.

You will partner across businesses to design and develop internal and external semiconductor packaging solutions, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages, while supporting qualification, testability and reliability goals in a