Career Accelerator Program - Packaging Engineer - PhD

Texas Instruments Incorporated; Santa Clara (CA); On-site; USD 95,000 - 110,000; Full time

Job summary

Texas Instruments in Santa Clara, CA invites new graduates to join a 12-month Packaging Engineer Development program as part of the TMG Development program, with hands-on training to accelerate ramp into TI and long-term career success.

You will partner across businesses to design and develop internal and external semiconductor packaging solutions, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages, while supporting qualification, testability and reliability goals in a

Qualifications

• Recent graduates entering a 12-month CAP program.

Responsibilities

• Partner with the businesses to design and develop internal and external packaging solutions, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages.
• Participate in cross-functional teams to support product qualification, production, reliability and yield requirements, design testability and test coverage.
• Direct design-of-experiments and collaborate with material suppliers to improve reliability and performance of advanced packaging.
• Conduct electrical, mechanical and thermal modeling to understand silicon-to-package interaction and establish design rules.

Job description

Change the world. Love your job.
In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI, and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. The TMG Development program is a 12-month program for new college graduates in the TMG organization.

Interface across various work areas and organizations to help with the design, development and analysis of different semiconductor packaging technologies to enable differentiation for TI's analog and embedded processing products. TI's innovative packaging technologies are designed to solve customers' problems by delivering advances in miniaturization, integration, high reliability, high performance, and low power. In this role you'll get the opportunity to thrive in a fast paced, dynamic environment where high-energy, prioritization skills and adaptability are a must!
Packaging engineers play an important role at TI which encompasses the following responsibilities:

• Partner with the businesses to design and develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages at different stages of readiness
• Participate in cross-functional teams, supporting product qualification and production, helping to meet reliability and yield requirements, design testability, and test coverage
• Direct design-of-experiments and work with material suppliers to downselect innovative packaging materials to enhance the reliability and performance of advanced packages.
• Conduct electrical, mechanical, thermal models to comprehend silicon-to-package interaction, establish design rules, and to predict and prevent the use of high risk designs.

As a Packaging engineer you will enjoy an environment of smart collaboration with a global team of the industry's top engineering minds at your disposal. TI's corporate culture is one of competitive spirit which fuels continued business growth and constant career opportunities. While ethical business practice is a central aspect of the work place-you will be treated with respect, dignity, kindness and courtesy.
Put your talent to work with us as a Packaging engineer !