New Grad Silicon Engineer – ASIC/FPGA & RFIC

InvestedintheMission

Irvine (CA)

On-site

USD 125,000 - 195,000

Full time

14 days+
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Benefits offered by this job

Stock options
401(k)
Health, dental, vision insurance
Paid parental leave
Vacation & holidays

Job summary

SpaceX is hiring a NEW GRADUATE ENGINEER for silicon engineering to develop next generation silicon for Starlink. You will join teams across RF/Analog IC, RTL, verification, physical design, DFT, and more in Palo Alto, Irvine, or Redmond.

The role requires hands-on, self-starting engineers who can contribute from pre-silicon through post-silicon and work on complex digital designs using SystemVerilog, Verilog, VHDL, and C/C++, with opportunities to touch Python scripting in lab setups.

Qualifications

  • Bachelor's degree in engineering, mathematics or physics or related field.
  • Experience with ASIC/SoC/FPGA/RFIC/MMIC technologies.
  • Ability to design and verify complex digital/analog/mixed-signal IC blocks.

Responsibilities

  • Participate in all phases of ASIC/FPGA design and verification.
  • Develop RTL designs and verification strategies for DSP and digital comms blocks.
  • Design RF/analog subsystems and model RFIC performance.
  • Perform physical design tasks including synthesis, floorplanning, placement, routing and signoff checks.

Skills

ASIC design
RTL design
SystemVerilog
Verilog
VHDL
C/C++
Python
DSP

Education

Bachelor's degree in engineering, mathematics or physics
MS/PhD in related field (preferred)

Tools

ADS
Spectre
HFSS
Momentum

Job description

SpaceX is hiring a NEW GRADUATE ENGINEER for silicon engineering to develop next generation silicon for Starlink. You will join teams across RF/Analog IC, RTL, verification, physical design, DFT, and more in Palo Alto, Irvine, or Redmond.

The role requires hands-on, self-starting engineers who can contribute from pre-silicon through post-silicon and work on complex digital designs using SystemVerilog, Verilog, VHDL, and C/C++, with opportunities to touch Python scripting in lab setups.

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