Entry-Level Silicon Engineer - ASIC/FPGA & DSP

SPACE EXPLORATION TECHNOLOGIES CORP

Irvine, Northern (CA, KY)

Hybrid

USD 125,000 - 195,000

Full time

11 days ago

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Benefits offered by this job

Stock incentives

Health insurance

401(k) retirement plan

Job summary

SpaceX is hiring a New Graduate Engineer for Silicon Engineering, with full-time positions available in Irvine, CA; Palo Alto, CA; or Redmond, WA. The role covers ASIC/FPGA design, verification, and RFIC/digital IC development for Starlink silicon and related projects.

The position targets graduates in 2026/2027 from engineering, mathematics, or physics programs. Strong programming in C/C++, Python, and SystemVerilog is welcomed, along with lab bring-up and sign-off activities.

Qualifications

Graduating with a bachelor’s degree, master’s degree or PhD in 2026 or 2027.
Bachelor’s degree in an engineering discipline, mathematics or physics.
Experience working with ASIC, SOC, FPGA, RFIC, or MMIC.

Responsibilities

Participate in all phases of ASIC/FPGA design and verification flows.
Contribute towards design architecture, RTL implementation and/or verification, and emulation.
Bring-up and validate ASICs and FPGAs in the lab (write embedded software using C/C++ and/or Python).
Hands-on self-starter who can execute the steps required to fully verify a complex digital design.
Simulate and model RFIC systems at high level and work with system architects, modem/DSP and ASIC engineers to partition functions between hardware and software domains.
Derive specifications for the RFIC subsystems and circuits.
Develop RF/microwave circuits in state-of-the-art SiGe or CMOS processes.
Perform IC floor planning and layout.
Digital Signal Processing
Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks.