New Grad Silicon Engineer: RF/Analog & DSP Focus

SpaceX

Irvine (CA)

On-site

USD 125,000 - 195,000

Full time

14 days+

A complete application in a minute

Tailored resume and cover letter, ready to send.

Get past ATS filters

Job summary

SpaceX is hiring a NEW GRADUATE ENGINEER for Silicon Engineering to help design and verify next‑generation silicon for Starlink. You will work across pre‑silicon to post‑silicon stages in RF/Analog IC, RTL design, verification, physical design, and more using state‑of‑the‑art tools.

The position is full‑time in California and beyond, with opportunities to contribute to architectural decisions, lab bring‑up, and edge‑case verification while growing technical breadth and depth.

Qualifications

  • Bachelor's, master's, or PhD in engineering, mathematics, or physics.
  • Graduating in 2026 or 2027.
  • Experience with ASIC/SOC/FPGA.
  • Hands-on verification experience preferred.

Responsibilities

  • Participate in all phases of ASIC/FPGA design and verification flows.
  • Contribute to design architecture, RTL, verification, and emulation.
  • Bring‑up and validate ASICs and FPGAs in the lab using C/C++ or Python.
  • Develop RF/analog IC designs and perform floor planning and layout.

Skills

ASIC/FPGA Design
RF/Analog IC Design
SystemVerilog
Python

Education

Bachelor's degree in engineering or physics
Graduating in 2026 or 2027

Tools

ADS
Spectre
HFSS
Momentum

Job description

SpaceX is hiring a NEW GRADUATE ENGINEER for Silicon Engineering to help design and verify next‑generation silicon for Starlink. You will work across pre‑silicon to post‑silicon stages in RF/Analog IC, RTL design, verification, physical design, and more using state‑of‑the‑art tools.

The position is full‑time in California and beyond, with opportunities to contribute to architectural decisions, lab bring‑up, and edge‑case verification while growing technical breadth and depth.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

New Grad Silicon Engineer – ASIC/FPGA & RFIC
New Grad Silicon Engineer – ASIC/FPGA & RFIC

SpaceX • Palo Alto (CA)

On-site
USD 135,000 - 210,000
Long-term incentives
Company stock
Discretionary bonuses
+3
New Graduate Engineer, Silicon Engineering
New Graduate Engineer, Silicon Engineering

SpaceX • Palo Alto (CA)

On-site
USD 135,000 - 210,000
Long-term incentives
Company stock
Discretionary bonuses
+3
New Graduate Engineer, Silicon Engineering
New Graduate Engineer, Silicon Engineering

SpaceX • Irvine (CA)

On-site
USD 125,000 - 195,000
Senior RFIC Design Engineer for Starlink Network
Senior RFIC Design Engineer for Starlink Network

SpaceX • Palo Alto (CA)

On-site
USD 180,000 - 250,000
Electrical Engineer - New Grad, Hardware & RF
Electrical Engineer - New Grad, Hardware & RF

Spacex • Bastrop (TX)

Hybrid
USD 70,000 - 95,000
Senior DSP & Systems Engineer — Silicon RF & AI
Senior DSP & Systems Engineer — Silicon RF & AI

SPACE EXPLORATION TECHNOLOGIES CORP • Palo Alto (CA)

On-site
USD 175,000 - 280,000
Stock options
Comprehensive medical, vision, and…
401(k) retirement plan
+1
Senior DSP & RF Systems Engineer—ASIC/FPGA
Senior DSP & RF Systems Engineer—ASIC/FPGA

SpaceX • Irvine (CA)

On-site
USD 165,000 - 265,000
Stock options
Long-term incentives
Employee stock purchase plan
+7
Senior DSP Systems Engineer — Silicon Innovation
Senior DSP Systems Engineer — Silicon Innovation

SpaceX • Palo Alto (CA)

On-site
USD 175,000 - 280,000
Stock options
Stock purchase plan
Medical benefits
+5
Senior RF Silicon Software Engineer, RFIC Systems
Senior RF Silicon Software Engineer, RFIC Systems

SpaceX • Washington

On-site
USD 160,000 - 220,000
Stock options
Employee Stock Purchase Plan
401(k) retirement plan
+3
Senior RF Silicon Software Engineer — Bring Up New Chips
Senior RF Silicon Software Engineer — Bring Up New Chips

SpaceX • Union Hill-Novelty Hill (WA)

On-site
USD 165,000 - 270,000